EPM7256AETC144-10N vs EPM7256AETI144-7N 对比

详细并排对比 EPM7256AETC144-10N 出自 Intel 和 EPM7256AETI144-7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7256AETC144-10N EPM7256AETI144-7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $15.95 $29.81
Family MAX 7000A MAX 7000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 5,000 5000
Macro Cells 256 —
Logic Array Blocks 16 —
Maximum User I/O Pins 120 (in 144-pin TQFP) —
Pin-to-Pin Propagation Delay (tPD) 10 ns —
Maximum Internal Frequency 95.2 MHz —
Supply Voltage (Core) 3.3 V —
I/O Voltage Tolerance 5 V-tolerant —
Configuration Memory EEPROM (non-volatile, in-system programmable) —
Programming Interface IEEE 1149.1 JTAG (ISP) JTAG (IEEE 1149.1) / ByteBlaster
封装 TQFP-144 (ETC suffix) TQFP-144
安装类型 Surface Mount Surface Mount
工作温度 -40C to +85C (industrial) -40 °C to +85 °C (industrial)
Technology CMOS, EEPROM-based —
Pin Compatibility Pin-compatible with 5.0V MAX 7000S family —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Macrocells — 256
User I/Os — 36 (industrial variant)
Logic Elements — 256
Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
I/O Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V tolerant
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fCNT) — 126.6 MHz
Process Technology — EEPROM (0.3 µm CMOS)
Lead-Free — Yes (per Altera product page)
MSL 等级 — [DATA_NEEDED: moisture sensitivity level]

数据手册与资源

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