EPM7256AETC144-10N vs EPM7256ATI144-10N 对比
详细并排对比 EPM7256AETC144-10N 出自 Intel 和 EPM7256ATI144-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7256AETC144-10N - MAX 7000A 256-Macro CPLD, 10ns TQFP-144 | Intel
EPM7256AETC144-10N ObsoleteAltera
EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera
EPM7256ATI144-10N ⚠ 最后一次采购规格对比
| 参数 | EPM7256AETC144-10N | EPM7256ATI144-10N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $15.95 | $30.10 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 5,000 | 5,000 |
| Macro Cells | 256 | — |
| Logic Array Blocks | 16 | — |
| Maximum User I/O Pins | 120 (in 144-pin TQFP) | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns | — |
| Maximum Internal Frequency | 95.2 MHz | 93.5 MHz |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Voltage Tolerance | 5 V-tolerant | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | — |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | — |
| 封装 | TQFP-144 (ETC suffix) | TQFP-144 |
| 安装类型 | Surface Mount | — |
| 工作温度 | -40C to +85C (industrial) | -40C to +85C (industrial) |
| Technology | CMOS, EEPROM-based | — |
| Pin Compatibility | Pin-compatible with 5.0V MAX 7000S family | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance per datasheet] |
| Macrocells | — | 256 |
| Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | [DATA_NEEDED: I/O count for 144-pin TQFP variant] |
| Pin-to-Pin Delay | — | 10 ns |
| Supply Voltage VCCINT | — | 3.3 V |
| MultiVolt I/O Voltage VCCIO | — | 2.5 V or 3.3 V |
| Programming Method | — | IEEE Std. 1149.1 JTAG (ISP) |
| Non-volatile Configuration | — | Yes (EEPROM) |