EPM7256AETC144-5N vs EPM7256ATI144-10N 对比

详细并排对比 EPM7256AETC144-5N 出自 Altera 和 EPM7256ATI144-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7256ATI144-10N EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera

EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera

EPM7256ATI144-10N ⚠ 最后一次采购

规格对比

参数 EPM7256AETC144-5N EPM7256ATI144-10N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 最后采购期
库存状态 有库存 有库存
单价(USD) $9.95 $30.10
Family MAX 7000A MAX 7000A
Logic Family CMOS —
Usable Gates 5,000 5,000
Macro Cells 256 —
Logic Blocks 16 —
User I/Os (Mouser listing) 36 —
User I/Os (DigChip listing) 84 —
Pin-to-Pin Propagation Delay (tPD) 4.5 ns —
Maximum Internal Frequency 227.3 MHz 93.5 MHz
Counter Speed 172.4 MHz —
Supply Voltage (VCCINT) 3.3 V —
Program Memory Type EEPROM (non-volatile) —
In-System Programmability Yes (JTAG) —
封装 TQFP-144 (Plastic Thin Quad Flat Pack) TQFP-144
工作温度 [DATA_NEEDED: operating temperature grade] -40C to +85C (industrial)
Lead-Free / RoHS Yes (N suffix) —
Speed Grade -5 —
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 256
Logic Array Blocks (LABs) — 16
User I/O Pins — [DATA_NEEDED: I/O count for 144-pin TQFP variant]
Pin-to-Pin Delay — 10 ns
Supply Voltage VCCINT — 3.3 V
MultiVolt I/O Voltage VCCIO — 2.5 V or 3.3 V
Programming Method — IEEE Std. 1149.1 JTAG (ISP)
Non-volatile Configuration — Yes (EEPROM)
RoHS 状态 — [DATA_NEEDED: RoHS compliance per datasheet]

数据手册与资源

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