EPM7256AETI144-7N vs EPM7256ATI144-10 对比
详细并排对比 EPM7256AETI144-7N 出自 Intel 和 EPM7256ATI144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7256AETI144-7N | EPM7256ATI144-10 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $29.81 | $10.95 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 5000 | — |
| Macrocells | 256 | 256 |
| User I/Os | 36 (industrial variant) | — |
| Logic Elements | 256 | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | 3.3 V |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V tolerant | 2.5 V or 3.3 V |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fCNT) | 126.6 MHz | — |
| Process Technology | EEPROM (0.3 µm CMOS) | EEPROM-based CMOS |
| 封装 | TQFP-144 | 144-pin TQFP |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | -40 °C to +85 °C (industrial) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ByteBlaster | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | Non-compliant (legacy Altera marking) |
| Lead-Free | Yes (per Altera product page) | — |
| MSL 等级 | [DATA_NEEDED: moisture sensitivity level] | — |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum Usable Gates | — | 5,000 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency (fCNT) | — | 93.5 MHz |
| User I/O Pins | — | 100 |
| Program Memory Type | — | EEPROM (non-volatile) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| 工作温度范围 | — | -40C to +85C (Industrial) |