EPM7256AQI208-10 vs EPM3256AQC208-10N 对比

详细并排对比 EPM7256AQI208-10 出自 Intel 和 EPM3256AQC208-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7256AQI208-10 EPM3256AQC208-10N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $13.22 $4.62
Family MAX 7000A —
Macrocells 256 —
Logic Array Blocks (LABs) 16 —
Usable Gates 5,000 10,000
User I/O Pins 68 —
Pin-to-Pin Propagation Delay 10 ns —
Maximum Internal Frequency 93.5 MHz —
Maximum Counter Frequency 227.3 MHz 227.3 MHz
Supply Voltage (Core) 3.3 V —
I/O Logic Compatibility 5.0 V, 3.3 V, 2.5 V (MultiVolt) —
封装 PQFP-208 —
Programmability EEPROM, in-system via JTAG (IEEE 1149.1) —
工作温度 -40C to +85C (industrial) 0C to +70C (Commercial)
Process Technology CMOS, EEPROM-based —
RoHS 状态 Compliant (lead-free per distributor data) [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data]
Series — MAX 3000A
Programmable Type — In-System Programmable (EEPROM)
Number of Macrocells — 256
Number of Logic Elements/Blocks — 16 LABs
Number of I/O Pins — 161 (158 user I/O per Arrow listing)
Propagation Delay (tpd) — 10 ns (max)
Supply Voltage - Internal — 3.0 V to 3.6 V (3.3 V typical)
封装 / 外壳 — 208-BFQFP / 208-PQFP (28x28 mm)
安装类型 — Surface Mount
ISP Compliance — IEEE Std. 1532
Boundary Scan — IEEE Std. 1149.1 (JTAG)
I/O Tolerance — 5 V tolerant, MultiVolt interface

数据手册与资源

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