EPM7256ATI144-10N vs EPM7256AETC144-10 对比
详细并排对比 EPM7256ATI144-10N 出自 Altera 和 EPM7256AETC144-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera
EPM7256ATI144-10N ⚠ 最后一次采购Intel
EPM7256AETC144-10 - MAX 7000A 256-Macrocell CPLD, 10ns, TQFP-144 | Intel
EPM7256AETC144-10 Obsolete规格对比
| 参数 | EPM7256ATI144-10N | EPM7256AETC144-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $30.10 | $31.40 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Usable Gates | 5,000 | 5,000 |
| User I/O Pins | [DATA_NEEDED: I/O count for 144-pin TQFP variant] | — |
| Pin-to-Pin Delay | 10 ns | — |
| Maximum Internal Frequency | 93.5 MHz | — |
| Supply Voltage VCCINT | 3.3 V | — |
| MultiVolt I/O Voltage VCCIO | 2.5 V or 3.3 V | — |
| Programming Method | IEEE Std. 1149.1 JTAG (ISP) | — |
| Non-volatile Configuration | Yes (EEPROM) | — |
| 封装 | TQFP-144 | 144-pin TQFP (TQFP-144) |
| 工作温度 | -40C to +85C (industrial) | 0C to +70C (commercial) |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance per datasheet] | [DATA_NEEDED: rohs_status] |
| Series | — | EPM7256AE |
| Macro Cells | — | 256 |
| Maximum User I/Os | — | 36 |
| Dedicated Inputs | — | 16 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency (fMAX) | — | 95.2 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V (5.0 V tolerant inputs on A-series) |
| Programming Interface | — | JTAG (IEEE 1149.1) + Fast Passive Serial |
| Non-Volatile Memory | — | EEPROM-based |