EPM7256ATI144-10N vs EPM7256AETI144-7N 对比

详细并排对比 EPM7256ATI144-10N 出自 Altera 和 EPM7256AETI144-7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM7256ATI144-10N EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera

EPM7256ATI144-10N - 256-Macrocell MAX 7000A CPLD, 144-TQFP | Altera

EPM7256ATI144-10N ⚠ 最后一次采购

规格对比

参数 EPM7256ATI144-10N EPM7256AETI144-7N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 不推荐新设计
库存状态 有库存 有库存
单价(USD) $30.10 $29.81
Family MAX 7000A MAX 7000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 256 256
Logic Array Blocks (LABs) 16 —
Usable Gates 5,000 5000
User I/O Pins [DATA_NEEDED: I/O count for 144-pin TQFP variant] —
Pin-to-Pin Delay 10 ns —
Maximum Internal Frequency 93.5 MHz —
Supply Voltage VCCINT 3.3 V —
MultiVolt I/O Voltage VCCIO 2.5 V or 3.3 V —
Programming Method IEEE Std. 1149.1 JTAG (ISP) —
Non-volatile Configuration Yes (EEPROM) —
封装 TQFP-144 TQFP-144
工作温度 -40C to +85C (industrial) -40 °C to +85 °C (industrial)
RoHS 状态 [DATA_NEEDED: RoHS compliance per datasheet] [DATA_NEEDED: RoHS compliance status]
User I/Os — 36 (industrial variant)
Logic Elements — 256
Supply Voltage (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
I/O Voltage (VCCIO) — 2.5 V / 3.3 V / 5.0 V tolerant
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fCNT) — 126.6 MHz
Process Technology — EEPROM (0.3 µm CMOS)
安装类型 — Surface Mount
Programming Interface — JTAG (IEEE 1149.1) / ByteBlaster
Lead-Free — Yes (per Altera product page)
MSL 等级 — [DATA_NEEDED: moisture sensitivity level]

数据手册与资源

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