EPM9320ALI84-10N vs EPM9320ALC84-10N 对比

详细并排对比 EPM9320ALI84-10N 出自 Altera 和 EPM9320ALC84-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320ALI84-10N EPM9320ALC84-10N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $21.95 $21.40
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture MAX (Multiple Array MatriX), 3rd generation —
Process Technology CMOS EEPROM —
Usable Gates 6,000 to 12,000 —
Macrocells 320 —
Logic Array Blocks (LABs) 20 —
User I/O Pins 56 60
Pin-to-Pin Delay 10 ns —
Maximum Counter Frequency 144.9 MHz —
VCCINT (Core Supply) 5.0 V —
VCCIO (I/O Supply) 3.3 V or 5.0 V —
Input Logic Levels TTL-compatible (at 5.0 V VCCINT) —
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) —
封装 84-pin PLCC (J-lead, 1.270 mm pitch) 84-Pin PLCC (Plastic Leaded Chip Carrier)
安装类型 Surface Mount (PLCC socket compatible) Through-Hole / Socket
工作温度 -40C to +85C (industrial) —
Configuration Memory EEPROM, non-volatile —
Series — MAX 9000A
Number of Macrocells — 320
Number of Gates — 6,000
Number of Logic Array Blocks (LABs) — 16
Propagation Delay (tPD) — 10 ns
Maximum Internal Frequency (fCNT) — 144.9 MHz
Supply Voltage (VCC) — 5.0 V nominal
工作温度范围 — 0C to +70C (Commercial)
Programmable Technology — EEPROM (in-system programmable)
Programming Interface — JTAG (IEEE 1149.1)
Part Status — Obsolete

数据手册与资源

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