EPM9320ARI208-10 vs EPM9320ARC208-10 对比

详细并排对比 EPM9320ARI208-10 出自 Intel 和 EPM9320ARC208-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM9320ARC208-10 EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 ⚠ 最后一次采购

规格对比

参数 EPM9320ARI208-10 EPM9320ARC208-10
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $27.20 $21.40
Programmable Type In System Programmable (ISP) —
Number of Macrocells 320 —
Number of Logic Elements/Blocks 20 —
Number of Gates 6000 —
Number of I/O 132 —
Propagation Delay tpd(1) Max 10 ns —
Maximum Counter Frequency 144.9 MHz —
Voltage Supply - Internal 4.5 V to 5.5 V —
工作温度 -40 C to +85 C (TA) [DATA_NEEDED: operating temperature range]
安装类型 Surface Mount Surface Mount
封装 / 外壳 208-BFQFP Exposed Pad —
Supplier Device Package 208-RQFP —
Configuration Memory EEPROM (non-volatile) —
JTAG Interface IEEE Std. 1149.1 compliant —
PCI Compliance PCI Local Bus Specification Rev 2.2 —
Product Status Obsolete —
Packaging Tray —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Device Family — MAX 9000
Product Type — CPLD (Complex Programmable Logic Device)
Macrocells — 320
Usable Gates — 6,000
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency — 144.9 MHz
电源电压 — 5.0 V
Logic Blocks (LABs) — 16
Programmability — EEPROM, in-system programmable via JTAG
JTAG Support — IEEE Std. 1149.1 compliant
Speed/Power Optimization — Per-macrocell programmable, 50% power mode available
封装 — RQFP-208 (Power Quad Flat Pack)

数据手册与资源

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