EPM9320ARI208-10 vs EPM9560RC-15 对比

详细并排对比 EPM9320ARI208-10 出自 Intel 和 EPM9560RC-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320ARI208-10 EPM9560RC-15
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $27.20 $30.10
Programmable Type In System Programmable (ISP) —
Number of Macrocells 320 —
Number of Logic Elements/Blocks 20 —
Number of Gates 6000 —
Number of I/O 132 —
Propagation Delay tpd(1) Max 10 ns —
Maximum Counter Frequency 144.9 MHz —
Voltage Supply - Internal 4.5 V to 5.5 V —
工作温度 -40 C to +85 C (TA) 0 C to +70 C (commercial)
安装类型 Surface Mount Surface Mount
封装 / 外壳 208-BFQFP Exposed Pad —
Supplier Device Package 208-RQFP —
Configuration Memory EEPROM (non-volatile) —
JTAG Interface IEEE Std. 1149.1 compliant —
PCI Compliance PCI Local Bus Specification Rev 2.2 —
Product Status Obsolete —
Packaging Tray —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 560
Usable Gates — 12,000
Logic Array Blocks (LABs) — 16 (40 macrocells each)
Maximum User I/O Pins — 191
Pin-to-Pin Delay (tPD1) — 15 ns
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5.0 V nominal)
封装 — 240-pin RQFP (32x32 mm)
Programming Interface — IEEE Std. 1149.1 JTAG (ISP)
Process Technology — CMOS EEPROM
Architecture — Multiple Array MatriX (MAX) - third generation
In-System Programmability — Yes (5.0 V ISP via JTAG)

数据手册与资源

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