EPM9320BC356-15 vs EPM9320ARC208-10 对比
详细并排对比 EPM9320BC356-15 出自 Altera 和 EPM9320ARC208-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9320BC356-15 | EPM9320ARC208-10 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $31.20 | $21.40 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Macrocells | 320 | 320 |
| Pin-to-Pin Delay (max) | 15 ns | — |
| Process Technology | CMOS EEPROM | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5.0 V typical) | — |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| 封装 | 356-ball LBGA (BGA-356, 35x35 mm) | RQFP-208 (Power Quad Flat Pack) |
| 安装类型 | Surface Mount | Surface Mount |
| Programmable Type | In System Programmable | — |
| Operating Temperature Grade | Commercial | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | MAX 9000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 6,000 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency | — | 144.9 MHz |
| 电源电压 | — | 5.0 V |
| Logic Blocks (LABs) | — | 16 |
| Programmability | — | EEPROM, in-system programmable via JTAG |
| JTAG Support | — | IEEE Std. 1149.1 compliant |
| Speed/Power Optimization | — | Per-macrocell programmable, 50% power mode available |
| 工作温度 | — | [DATA_NEEDED: operating temperature range] |