EPM9320LC84-10 vs EPM9320ALC84-10N 对比
详细并排对比 EPM9320LC84-10 出自 Intel 和 EPM9320ALC84-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9320LC84-10 | EPM9320ALC84-10N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $84.96 | $21.40 |
| Family | MAX 9000 EPLD | MAX 9000 |
| Device | EPM9320 | — |
| Macrocells | 320 | — |
| Usable Gates | 6000 (typical) | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 168 (varies by package) | — |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Maximum Frequency (fCNT) | [DATA_NEEDED: fCNT in MHz] | — |
| Supply Voltage (VCC) | 5.0 V (typical, see datasheet) | 5.0 V nominal |
| Process Technology | 0.7 µm CMOS EEPROM/UV-EPROM | — |
| 封装 | 84-pin PLCC (JEDEC MO-047) | 84-Pin PLCC (Plastic Leaded Chip Carrier) |
| 安装类型 | Surface Mount (PLCC socket also common) | Through-Hole / Socket |
| 工作温度 | 0C to +70C (commercial) [DATA_NEEDED: exact grade suffix] | — |
| Programming Interface | JTAG (IEEE 1149.1) boundary-scan, Altera ByteBlaster compatible | JTAG (IEEE 1149.1) |
| Configuration | Non-volatile EEPROM (instant-on, no boot PROM) | — |
| RoHS 状态 | ROHS3 Compliant (per fpgalink listing) | — |
| 湿敏等级（MSL） | MSL-3, 168 hours (per fpgalink listing) | — |
| Manufacturer Lead Time | 1-7 days (per fpgalink listing) | — |
| Series | — | MAX 9000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | — | 320 |
| Number of Gates | — | 6,000 |
| Number of Logic Array Blocks (LABs) | — | 16 |
| User I/O Pins | — | 60 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency (fCNT) | — | 144.9 MHz |
| 工作温度范围 | — | 0C to +70C (Commercial) |
| Programmable Technology | — | EEPROM (in-system programmable) |
| Part Status | — | Obsolete |