EPM9320RC208-10 vs EPM9320RC208-20N 对比
详细并排对比 EPM9320RC208-10 出自 Altera 和 EPM9320RC208-20N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9320RC208-10 | EPM9320RC208-20N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $26.40 | $0.00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| 封装 | 208-pin RQFP (RC) | 208-pin RQFP (PowerQuad II) |
| 工作温度 | Commercial (0C to +70C) - 'C' suffix | [DATA_NEEDED: operating temperature range] |
| 电源电压 | 5 V | 5.0 V |
| Speed Grade | -10 | — |
| Programming Interface | JTAG (ByteBlaster/BitBlaster) | — |
| Non-volatile Configuration | Yes (EPROM/EEPROM based) | — |
| Design Tool Support | MAX+PLUS II, Quartus (legacy) | — |
| RoHS 状态 | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS status] |
| 湿敏等级（MSL） | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Device Family | — | MAX 9000 |
| Logic Type | — | Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 320 |
| Logic Array Blocks | — | 20 |
| Maximum Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| User I/O Pins | — | 168 |
| 安装类型 | — | Surface Mount |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |