EPM9320RC208-20 vs EPM9320ARI208-10 对比

详细并排对比 EPM9320RC208-20 出自 Altera 和 EPM9320ARI208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320RC208-20 EPM9320ARI208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $21.90 $27.20
Family MAX 9000 —
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 320 —
Logic Array Blocks (LABs) 20 —
Usable Gates 6,000 —
Maximum I/O Pins 132 —
Propagation Delay (tPD max) 20 ns —
Supply Voltage (VCCINT) 4.75 V to 5.25 V —
Programming Technology EEPROM, in-system programmable (ISP) —
Boundary-Scan Interface IEEE Std. 1149.1 (JTAG) —
工作温度 0 °C to 70 °C (commercial) -40 C to +85 C (TA)
封装 208-RQFP, exposed pad (208-BFQFP) —
安装类型 Surface Mount Surface Mount
Architecture Multiple Array Matrix (MAX), 3rd generation —
Process Technology CMOS, 5.0 V EEPROM —
Reprogrammability Yes, unlimited ISP cycles —
Programmable Type — In System Programmable (ISP)
Number of Macrocells — 320
Number of Logic Elements/Blocks — 20
Number of Gates — 6000
Number of I/O — 132
Propagation Delay tpd(1) Max — 10 ns
Maximum Counter Frequency — 144.9 MHz
Voltage Supply - Internal — 4.5 V to 5.5 V
封装 / 外壳 — 208-BFQFP Exposed Pad
Supplier Device Package — 208-RQFP
Configuration Memory — EEPROM (non-volatile)
JTAG Interface — IEEE Std. 1149.1 compliant
PCI Compliance — PCI Local Bus Specification Rev 2.2
Product Status — Obsolete
Packaging — Tray
RoHS 状态 — [DATA_NEEDED: RoHS status]

数据手册与资源

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