EPM9320RC208-20 vs EPM9400RC208-20 对比

详细并排对比 EPM9320RC208-20 出自 Altera 和 EPM9400RC208-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9320RC208-20 EPM9400RC208-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $21.90 $60.49
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 320 —
Logic Array Blocks (LABs) 20 —
Usable Gates 6,000 8,000
Maximum I/O Pins 132 —
Propagation Delay (tPD max) 20 ns —
Supply Voltage (VCCINT) 4.75 V to 5.25 V —
Programming Technology EEPROM, in-system programmable (ISP) —
Boundary-Scan Interface IEEE Std. 1149.1 (JTAG) —
工作温度 0 °C to 70 °C (commercial) [DATA_NEEDED: operating temperature range]
封装 208-RQFP, exposed pad (208-BFQFP) 208-pin RQFP (28x28 mm)
安装类型 Surface Mount Surface Mount
Architecture Multiple Array Matrix (MAX), 3rd generation —
Process Technology CMOS, 5.0 V EEPROM —
Reprogrammability Yes, unlimited ISP cycles —
Programmable Type — In System Programmable (ISP)
Macro Cells — 400
Pin-to-Pin Propagation Delay — 20 ns
Maximum Operating Frequency — 100 MHz
Supply Voltage (Internal) — 4.75 V to 5.25 V
Configuration Technology — EEPROM-based (non-volatile)
JTAG Interface — IEEE Std. 1149.1
Supplier Device Package — 208-RQFP
Number of I/O Pins — [DATA_NEEDED: user I/O count]
RoHS 状态 — [DATA_NEEDED: RoHS compliance]
MSL 等级 — [DATA_NEEDED: moisture sensitivity level]
Speed Grade — -20 (20 ns)

数据手册与资源

浏览全部产品 创建 BOM 获取报价