EPM9480RC240-15 vs EPM9480RC240-20 对比
详细并排对比 EPM9480RC240-15 出自 Altera 和 EPM9480RC240-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9480RC240-15 | EPM9480RC240-20 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $91.68 | $8.40 |
| Programmable Type | In System Programmable (ISP) | — |
| Device Family | MAX 9000 | — |
| Macro Cells | 480 | — |
| Usable Gates | 12,000 | 10,000 |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Internal Supply Voltage | 4.75 V to 5.25 V | 4.75 V to 5.25 V |
| Configuration Technology | EEPROM-based (non-volatile) | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| 封装 | 240-pin RQFP (32x32 mm) | 240-RQFP (32x32 mm, FQFP, Gull Wing) |
| Supplier Device Package | 240-RQFP (32x32) | — |
| 安装类型 | Surface Mount | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | — |
| Number of I/O Pins | [DATA_NEEDED: user I/O count] | — |
| RoHS 状态 | RoHS non-compliant | [DATA_NEEDED: RoHS status] |
| Lead Free Status | [DATA_NEEDED: lead free status] | — |
| Logic Architecture | Multiple Array MatriX (MAX) third-generation | — |
| Supply Voltage (5.0 V nominal) | 5.0 V | — |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 480 |
| Logic Elements | — | 30 |
| User I/O Pins | — | 175 |
| Number of Terminals | — | 240 |
| Maximum Propagation Delay (tpd) | — | 20 ns |
| Maximum Internal Frequency (fMAX, related -C variant) | — | 100 MHz |
| Programmable Flip-Flops (family) | — | 676 |
| I/O Signaling Levels | — | 3.3 V or 5 V (configurable) |
| Process Technology | — | CMOS EEPROM |
| Programming Interface | — | In-System Programmable (ISP) via IEEE 1149.1 JTAG |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | Gull Wing |