EPM9480RC240-15 vs EPM9560GC280-15N 对比

详细并排对比 EPM9480RC240-15 出自 Altera 和 EPM9560GC280-15N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9480RC240-15 EPM9560GC280-15N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $91.68 $125.00
Programmable Type In System Programmable (ISP) —
Device Family MAX 9000 MAX 9000
Macro Cells 480 —
Usable Gates 12,000 12,000 (typical)
Pin-to-Pin Delay (tPD) 15 ns —
Internal Supply Voltage 4.75 V to 5.25 V —
Configuration Technology EEPROM-based (non-volatile) —
JTAG Interface IEEE Std. 1149.1 —
封装 240-pin RQFP (32x32 mm) CPGA-280 (Ceramic Pin Grid Array, 280 pins)
Supplier Device Package 240-RQFP (32x32) —
安装类型 Surface Mount —
工作温度 [DATA_NEEDED: operating temperature range] —
Number of I/O Pins [DATA_NEEDED: user I/O count] —
RoHS 状态 RoHS non-compliant —
Lead Free Status [DATA_NEEDED: lead free status] —
Logic Architecture Multiple Array MatriX (MAX) third-generation —
Supply Voltage (5.0 V nominal) 5.0 V —
Product Type — EE PLD / CPLD
Macrocell Count — 560
Propagation Delay (tPD) — 16.6 ns
最大时钟频率 — 117.6 MHz
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Maximum Supply Voltage — 5.25 V
Logic Technology — CMOS EEPROM
In-System Programmability — Yes (5.0-V ISP via JTAG)
Boundary-Scan (JTAG) — IEEE Std. 1149.1 compliant
Package Code — PGA / CPGA280
Terminal Form — PIN/PEG
Operating Temperature Grade — Commercial
Architecture — Multiple Array MatriX (MAX) 3rd generation

数据手册与资源

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