EPM9560ARI240-10N vs EPM9560ARC240-10N 对比

详细并排对比 EPM9560ARI240-10N 出自 Intel 和 EPM9560ARC240-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560ARI240-10N EPM9560ARC240-10N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $105.00 $19.50
Family MAX 9000 MAX 9000
Product Type CPLD (Complex Programmable Logic Device) —
Usable Gates 12,000 —
Macrocells 560 —
Logic Array Blocks (LABs) 16 16
User I/Os 216 (per digchip); 191 (per Mouser) 191
Maximum Internal Frequency 144.9 MHz (typical); 145 MHz (per digchip) —
Propagation Delay (tPD) 10 ns (-10 speed grade) 10 ns
电源电压 5.0 V nominal (4.5 V min, 5.5 V max) —
Logic Family CMOS, EEPROM-based MAX 9000 (CPLD)
In-System Programmability Yes (5.0 V ISP via JTAG) —
封装 240-pin RQFP (RQFP-240 / PQFP-240) 240-pin RQFP (32x32 mm)
安装类型 Surface Mount Surface Mount
工作温度 -40C to +85C (industrial) 0°C to +70°C (Commercial)
Architecture Multiple Array MatriX (MAX) - 3rd generation —
JTAG (IEEE 1149.1) Yes —
Lead-Free / RoHS [DATA_NEEDED: lead-free / RoHS status not in provided data] —
Process Technology — CMOS EEPROM
Macro Cells — 560
Internal Frequency (fMAX) — 145 MHz
Supply Voltage (VCCINT) — 5.0 V
Programming Interface — IEEE 1149.1 JTAG / ByteBlaster
Programmability — In-system, EEPROM-based (non-volatile)
I/O Standard — 5.0 V TTL-compatible
RoHS 状态 — Non-RoHS (legacy Altera part)

数据手册与资源

浏览全部产品 创建 BOM 获取报价