EPM9560GI280-15 vs EPM9560GC280-20 对比

详细并排对比 EPM9560GI280-15 出自 Intel 和 EPM9560GC280-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560GI280-15 EPM9560GC280-20
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $110.00 $360.00
Device Family MAX 9000 —
Architecture CMOS EEPROM, third-generation Multiple Array MatriX (MAX) —
Macrocells 560 560
Flip-Flops 772 —
User I/Os 216 —
Dedicated Inputs 12 —
Logic Elements / Gates 12,000 usable gates —
Internal Frequency (fMAX) 145 MHz —
Propagation Delay (tPD) 11.4 ns —
Clock-to-Output (tCO) 16.6 ns —
Supply Voltage (VCCINT/VCCIO) 4.5 V to 5.5 V (3.3 V or 5 V I/O) —
In-System Programmability 5.0-V ISP via JTAG —
封装 280-pin PGA (ceramic, metal-sealed cofired) 280-pin CPGA (Ceramic Pin Grid Array)
工作温度 -40 °C to 85 °C (industrial) [DATA_NEEDED: commercial/industrial/military grade]
Process Technology CMOS EEPROM CMOS EEPROM
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant]
湿敏等级(MSL) MSL-3 (168 hours) —
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 12,000
Maximum User I/O — 212
Pin-to-Pin Delay — 20 ns (speed grade -20)
Counter Frequency (max) — 100 MHz
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5.0 V nominal)
I/O Voltage — 3.3 V or 5.0 V configurable
In-System Programming — Yes, via IEEE 1149.1 JTAG
安装类型 — Through-Hole (CPGA socket)

数据手册与资源

浏览全部产品 创建 BOM 获取报价