EPM9560RC208-10N vs EPM9560RC208-12 对比

详细并排对比 EPM9560RC208-10N 出自 Intel 和 EPM9560RC208-12 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EPM9560RC208-10N EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel

EPM9560RC208-10N - MAX 9000 CPLD 560 Macro 10ns 208-RQFP | Intel

EPM9560RC208-10N ⚠ 最后一次采购

规格对比

参数 EPM9560RC208-10N EPM9560RC208-12
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $175.00 $0.00
Family MAX 9000 MAX 9000
Device EPM9560 —
Macro Cells 560 —
Usable Gates 12,000 12000
Logic Array Blocks (LABs) 16 —
User I/O Pins 153 —
Pin-to-Pin Delay (tPD1) 10 ns —
Supply Voltage (VCCINT) 5.0 V 5 V
I/O Bank Voltage (VCCIO) 5.0 V —
封装 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (S-PQFP-G208)
安装类型 Surface Mount Surface Mount
Process Technology CMOS EEPROM —
Programmability In-system via IEEE 1149.1 JTAG —
工作温度 [DATA_NEEDED: operating temperature grade] 0C to +70C (commercial)
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Device Type — EEPROM-based CPLD
Macrocells — 560
Flip-Flops — 772
User I/O Lines — 153
Propagation Delay (tPD) — 12 ns
最大时钟频率 — 125 MHz
I/O Voltage Compatibility — 3.3 V or 5 V
Terminal Pitch — 0.50 mm
Configuration Memory — EEPROM (non-volatile)
Logic Array Blocks — 20
Speed Grade — -12 (12 ns)

数据手册与资源

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