EPM9560RC208-14 vs EPM9560RC208-10 对比

详细并排对比 EPM9560RC208-14 出自 Altera 和 EPM9560RC208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC208-14 EPM9560RC208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $27.90 $15.40
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 16
User I/O Pins 149 —
Maximum Operating Frequency 117.6 MHz —
Pin-to-Pin Propagation Delay 14 ns —
电源电压 5 V —
I/O Voltage Support 3.3 V / 5 V —
Program Memory Type EEPROM (non-volatile) —
In-System Programmability Yes (JTAG, IEEE 1149.1) —
封装 208-pin RQFP (PQFP) 208-pin RQFP (Plastic Quad Flat Pack)
安装类型 Surface Mount Surface Mount
Process Technology 0.35 µm CMOS EEPROM 0.30 µm CMOS EEPROM
RoHS 状态 Non-compliant (legacy part) [DATA_NEEDED: not stated in retrieved distributor listings]
Maximum User I/O Pins — 212 (208-pin package variant)
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
工作温度 — 0C to +70C (commercial)
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

数据手册与资源

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