EPM9560RC208-3 vs EPM9560RC208-10 对比

详细并排对比 EPM9560RC208-3 出自 Altera 和 EPM9560RC208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM9560RC208-3 EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera

EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera

EPM9560RC208-3 ⚠ 最后一次采购

规格对比

参数 EPM9560RC208-3 EPM9560RC208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $58.50 $15.40
Family MAX 9000 MAX 9000
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 560 560
Logic Array Blocks (LABs) 16 16
Usable Gates 12,000 12,000
Maximum Operating Frequency [DATA_NEEDED: f_MAX] —
Pin-to-Pin Delay (speed grade -3) approximately 3 ns (slowest grade) —
Speed Grade -3 —
封装 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
I/O Voltage Tolerance 5V —
Process Technology 0.5 µm CMOS EPROM 0.30 µm CMOS EEPROM
Programming Interface ByteBlaster / BitBlaster (JTAG-compatible) —
工作温度 [DATA_NEEDED: industrial / commercial range] 0C to +70C (commercial)
RoHS 状态 [DATA_NEEDED] [DATA_NEEDED: not stated in retrieved distributor listings]
Lifecycle Mature / Last-time-buy (per Altera PDN for selected MAX 9000 ordering codes) —
Maximum User I/O Pins — 212 (208-pin package variant)
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
安装类型 — Surface Mount
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

数据手册与资源

浏览全部产品 创建 BOM 获取报价