EPM9560RC208-3 vs EPM9560RC208-12 对比

详细并排对比 EPM9560RC208-3 出自 Altera 和 EPM9560RC208-12 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM9560RC208-3 EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera

EPM9560RC208-3 - 560 Macrocell MAX 9000 EPLD | Intel / Altera

EPM9560RC208-3 ⚠ 最后一次采购

规格对比

参数 EPM9560RC208-3 EPM9560RC208-12
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $58.50 $0.00
Family MAX 9000 MAX 9000
Device Type EPLD (Erasable Programmable Logic Device) EEPROM-based CPLD
Macrocells 560 560
Logic Array Blocks (LABs) 16 —
Usable Gates 12,000 12000
Maximum Operating Frequency [DATA_NEEDED: f_MAX] —
Pin-to-Pin Delay (speed grade -3) approximately 3 ns (slowest grade) —
Speed Grade -3 -12 (12 ns)
封装 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (S-PQFP-G208)
I/O Voltage Tolerance 5V —
Process Technology 0.5 µm CMOS EPROM —
Programming Interface ByteBlaster / BitBlaster (JTAG-compatible) —
工作温度 [DATA_NEEDED: industrial / commercial range] 0C to +70C (commercial)
RoHS 状态 [DATA_NEEDED] [DATA_NEEDED: RoHS status]
Lifecycle Mature / Last-time-buy (per Altera PDN for selected MAX 9000 ordering codes) —
Flip-Flops — 772
User I/O Lines — 153
Propagation Delay (tPD) — 12 ns
最大时钟频率 — 125 MHz
Supply Voltage (VCCINT) — 5 V
I/O Voltage Compatibility — 3.3 V or 5 V
Terminal Pitch — 0.50 mm
安装类型 — Surface Mount
Configuration Memory — EEPROM (non-volatile)
Logic Array Blocks — 20

数据手册与资源

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