EPM9560RC208-9 vs EPM9560RC208-10 对比

详细并排对比 EPM9560RC208-9 出自 Altera 和 EPM9560RC208-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC208-9 EPM9560RC208-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $71.00 $15.40
Family MAX 9000 MAX 9000
Device Type CPLD / EPLD CPLD (Complex Programmable Logic Device)
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 16 16
User I/O Pins 212 —
Pin-to-Pin Delay (tPD) 9 ns 10 ns
Maximum Operating Frequency [DATA_NEEDED: fMAX from datasheet] —
Core Voltage 5 V —
Supply Voltage Range 4.75 V to 5.25 V —
Programmability In-system programmable (JTAG) JTAG (IEEE 1149.1) in-system programming
封装 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
Speed Grade -9 —
工作温度 [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: not stated in retrieved distributor listings]
Process Technology EPROM-based (one-time programmable) / UV-erasable 0.30 µm CMOS EEPROM
Maximum User I/O Pins — 212 (208-pin package variant)
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]

数据手册与资源

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