EPM9560RC240-12 vs EPM9560ARC240-10 对比

详细并排对比 EPM9560RC240-12 出自 Altera 和 EPM9560ARC240-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC240-12 EPM9560ARC240-10
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.95 $28.80
Family MAX 9000 (EPM9560) MAX 9000
Device Type EE PLD / CPLD CPLD (Complex Programmable Logic Device)
Macrocells 560 560
Flip-Flops 772 —
User I/O Pins 191 —
Logic Array Blocks (LABs) 20 —
Maximum Propagation Delay (tPD) 13.4 ns —
Speed Grade -12 (13.4 ns tPD) —
Maximum Operating Frequency (estimated) ~76 MHz registered —
Core Supply Voltage (VCCINT) 5 V —
I/O Logic Levels 3.3 V or 5 V (configurable) —
封装 PQFP-240 (RC240) 0.500 mm pitch, gull-wing 240-pin PowerQuad QFP (RQFP / EAR240)
安装类型 Surface Mount —
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile, in-system programmable)
Programming Interface IEEE 1149.1 JTAG —
Process Technology CMOS CMOS EEPROM
工作温度 [DATA_NEEDED: operating temperature grade] 0C to +70C (commercial)
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Architecture — Multiple Array MatriX (MAX) - third generation
Usable Gates — 12,000
User I/Os (this package) — 191 (per Mouser listing)
Internal Frequency — 144.9 MHz
Propagation Delay (tpd) — 11.4 ns
Supply Voltage - Internal (VCCINT) — 5.0 V
I/O Supply Voltage (VCCIO) — 3.3 V or 5.0 V (selectable)
Logic Family — CMOS

数据手册与资源

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