EPM9560RC240-15N vs EPM9560RC240-10N 对比
详细并排对比 EPM9560RC240-15N 出自 Altera 和 EPM9560RC240-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM9560RC240-10N - MAX 9000 CPLD 560 Macrocells 5V 240-Pin RQFP | Intel
EPM9560RC240-10N ⚠ 最后一次采购规格对比
| 参数 | EPM9560RC240-15N | EPM9560RC240-10N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $27.85 | $168.00 |
| Series | MAX 9000 | — |
| Family | MAX 9000 (third-generation Multiple Array MatriX) | MAX 9000 |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 16 |
| Maximum User I/O Pins | 216 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | 10 ns (-10 speed grade) |
| Internal Counter Frequency (fCNT) | 145 MHz | — |
| Global Setup Time (tFSU) | [DATA_NEEDED: tFSU for -15 grade] | — |
| Clock-to-Output Time (tFCO) | [DATA_NEEDED: tFCO for -15 grade] | — |
| 电源电压 | 5.0 V | 5.0 V |
| Logic Family | CMOS (EEPROM-based) | — |
| Programmability | In-system programmable (IEEE 1532/JTAG) | — |
| Boundary-Scan Test | JTAG (IEEE 1149.1) | — |
| 工作温度 | 0C to +70C (Commercial) | — |
| 封装 | RQFP-240 (240-pin Plastic Quad Flat Pack) | 240-pin RQFP (Plastic Quad Flat Pack) |
| 安装类型 | Surface Mount | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] | ROHS3 Compliant (per fpgalink.com listing) |
| Architecture | — | Multiple Array MatriX (MAX) - 3rd generation |
| User I/Os | — | 212 |
| Internal Operating Frequency | — | 144.9 MHz |
| Process Technology | — | 0.65 µm CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE 1149.1) - in-system programmable |
| I/O Standards Supported | — | 5.0 V TTL/CMOS, 3.3 V PCI-compatible |
| Operating Temperature (Commercial) | — | 0 °C to +70 °C |
| Lead-Free Finish (N suffix) | — | Yes (Pb-free) |
| 湿敏等级（MSL） | — | 3 (168 hours) |