EPM9560RC240-1O vs EPM9560RC240-20 对比

详细并排对比 EPM9560RC240-1O 出自 Intel 和 EPM9560RC240-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC240-1O EPM9560RC240-20
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $51.07 $122.00
Family MAX 9000 MAX 9000
Usable Gates 12,000 —
Macrocells 560 —
Logic Array Blocks (LABs) 35 —
Maximum User I/O Pins 216 —
Propagation Delay (tPD) 12 ns (typ, -1 speed grade) —
Global Setup Time (tFSU) 3.0 ns —
Clock-to-Output (tFCO) 4.8 ns —
Maximum Internal Frequency (fCNT) 145 MHz —
Supply Voltage (VCC) 5.0 V —
Operating Temperature (Grade) -40C to +85C (industrial, "-1O" suffix) —
Process Technology CMOS EEPROM, 0.65 um —
Programming In-system programmable via IEEE 1149.1 JTAG —
Architecture Multiple Array MatriX (MAX), third generation —
封装 RQFP-240 (240-pin Reduced-height QFP) —
安装类型 Surface Mount Surface Mount
RoHS 状态 Compliant (per Altera/Intel product page) —
Lead-Free Yes —
Series — MAX 9000 PLD Family
Programmable Type — In System Programmable
Number of Macrocells — 560
Number of Gates — 12,000
Number of Logic Elements/Blocks — 35 LABs
Number of User I/Os — 191
Propagation Delay (tPD max) — 20 ns
Maximum Internal Frequency — 100 MHz
Supply Voltage (VCCINT) — 4.75 V to 5.25 V
Technology — CMOS, EEPROM-based
工作温度 — 0C to 70C (Commercial)
封装 / 外壳 — 240-BFQFP Exposed Pad (RQFP-240)
Supplier Device Package — 240-RQFP
Programming Interface — JTAG (IEEE 1149.1), Altera proprietary
Product Status — Obsolete
Lead-Free / RoHS — [DATA_NEEDED: RoHS status for this lot]

数据手册与资源

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