EPM9560RC340-15 vs EPM9560RC304-15 对比
详细并排对比 EPM9560RC340-15 出自 Altera 和 EPM9560RC304-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560RC340-15 | EPM9560RC304-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $24.00 | $9.40 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5.0 V nominal) | — |
| User I/O Pins | 212 | 212 (maximum) |
| 封装 | 340-RQFP (Reduced Quad Flat Pack) | 304-pin RQFP (Plastic Quad Flat Pack) |
| 安装类型 | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes, via IEEE Std. 1149.1 JTAG |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | Multiple Array MatriX (MAX), EEPROM-based |
| Boundary Scan | IEEE Std. 1149.1 JTAG | — |
| Programming Technology | EEPROM (non-volatile, reprogrammable) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status - not explicitly stated in verified data] | [DATA_NEEDED: lead-free / RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | MAX 9000 |
| Logic Array Blocks (LABs) | — | 16 |
| Propagation Delay (tPD) | — | 15 ns (combinatorial, pin-to-pin) |
| 引脚数量 | — | 304 |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standard | — | 5.0 V TTL / PCI-compliant |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |
| Technology Node | — | High-performance CMOS, EEPROM process |
| 工作温度 | — | [DATA_NEEDED: industrial/commercial temperature grade] |