EPM9560RI208-15N vs EPM9560RI205-15 对比
详细并排对比 EPM9560RI208-15N 出自 Altera 和 EPM9560RI205-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560RI208-15N | EPM9560RI205-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $19.45 | $54.00 |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Device Family | MAX 9000 | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Architecture | Multiple Array MatriX (MAX), 3rd generation | — |
| Configuration Memory | CMOS EEPROM, in-system programmable | — |
| 封装 | 208-pin RQFP (Ruggedized Quad Flat Pack) | RQFP-205 (PowerQuad4) |
| Total Pins | 356 (per third-party catalog; see _validation_note) | — |
| Package Pin Count | 208 | — |
| Terminal Form | Gull Wing | — |
| Package Code | HFQFP | — |
| User I/Os | 216 (per DigiChip specification; see _validation_note) | — |
| Maximum Internal Frequency | 145 MHz | — |
| Propagation Delay (tPD) | 11.4 ns (15 ns speed grade) | — |
| Speed Grade | -15 | -15 (15 ns pin-to-pin delay) |
| 电源电压 | 5.0 V | — |
| 工作温度 | 0C to 70C (Commercial) | -40 C to +85 C (industrial) |
| Temperature Grade | Industrial (per Vyrian/Partstack listings) | — |
| Logic Family | CMOS | — |
| Programming Interface | IEEE 1149.1 JTAG, 5.0-V in-system | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs_compliance] |
| Family | — | MAX 9000 |
| Device | — | EPM9560 |
| Logic Capacity | — | 6,000 usable gates |
| Macrocells | — | 212 |
| Logic Array Blocks (LABs) | — | 20 |
| Maximum User I/O Pins | — | 164 |
| Propagation Delay (tpd) | — | 15 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| 安装类型 | — | Surface Mount |