EPM9560RI240-20N vs EPM9560RI240-15N 对比
详细并排对比 EPM9560RI240-20N 出自 Intel 和 EPM9560RI240-15N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560RI240-20N | EPM9560RI240-15N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $0.00 |
| Family | MAX 9000 | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/Os | 191 | — |
| Maximum Internal Frequency | 145 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 11.4 ns | — |
| Logic Family | CMOS | MAX 9000 (Multiple Array MatriX) |
| Process Technology | CMOS EEPROM | — |
| Programmability | In-system programmable (ISP) via JTAG (IEEE 1149.1) | — |
| Core Supply Voltage | 5.0 V | — |
| MultiVolt I/O | 5.0 V / 3.3 V compatible | — |
| 封装 | 240-pin Power-enhanced BGA (RI240) | 240-pin RQFP (PowerQuad Flat Pack) |
| 工作温度 | 0C to +70C (commercial) | — |
| Programming Language Support | AHDL, VHDL, Verilog HDL | — |
| Development Tools | MAX+PLUS II, Quartus II | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | RoHS3 Compliant |
| Device Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Flip-Flops | — | 772 |
| Usable Gates | — | 12,000 |
| User I/O Pins | — | 216 |
| Pin-to-Pin Propagation Delay | — | 15 ns |
| Internal Frequency | — | 145 MHz |
| 电源电压 | — | 5.0 V |
| I/O Voltage Compatibility | — | 3.3 V or 5.0 V configurable |
| Configuration Memory | — | EEPROM (non-volatile, in-system programmable) |
| JTAG Interface | — | IEEE 1149.1 (JTAG) boundary scan |
| 工作温度范围 | — | -40 C to +85 C (industrial) |
| 安装类型 | — | Surface Mount |
| Moisture Sensitivity Level | — | MSL 3 (168 hours) |
| Manufacturer Standard Lead Time | — | 1-7 days (distributor stock) |