EPM9560RI304-20 vs EPM9560RI304-15N 对比

详细并排对比 EPM9560RI304-20 出自 Intel 和 EPM9560RI304-15N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RI304-20 EPM9560RI304-15N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $18.50 $88.75
Device Family MAX 9000 —
Architecture Multiple Array MatriX (MAX) - 3rd generation Multiple Array MatriX (MAX), third-generation, PIA interconnect
Macrocell Count 560 —
Logic Array Blocks (LABs) 16 (max) 16
Pin-to-Pin Delay (tPD) 20 ns —
Maximum User I/O Pins 212 —
Supply Voltage (VCC) 5.0 V —
Programmable Technology CMOS EEPROM —
In-System Programmability Yes, via JTAG (IEEE 1149.1) —
Boundary Scan IEEE Std. 1149.1 JTAG —
封装 304-pin RQFP (Plastic Quad Flat Pack) RQFP-304 (HFQFP-304), 1.27 mm gull-wing pitch
安装类型 Surface Mount —
工作温度 [DATA_NEEDED: industrial/commercial range] —
Reprogram Cycles 100+ (EEPROM) —
RoHS 状态 [DATA_NEEDED: lead-free / RoHS variant] —
Family — MAX 9000
Series / Part Number — EPM9560
Device Type — CPLD (EE PLD), in-system programmable, EEPROM-based
Macrocells — 560
Flip-Flops — 772
User I/Os — 216
Maximum Internal Frequency — 145 MHz
Propagation Delay (pin-to-pin) — 15 ns (speed grade -15)
电源电压 — 5.0 V core, multi-volt I/O (3.3 V / 5.0 V)
Process Technology — High-performance CMOS, EEPROM configuration memory
引脚数量 — 304
Operating Temperature (commercial) — 0 C to 70 C
Programming Interface — JTAG (IEEE 1532 / IEEE 1149.1) in-system programmable
Lead-Free / RoHS — [DATA_NEEDED: lead-free / RoHS status of EPM9560RI304-15N]

数据手册与资源

浏览全部产品 创建 BOM 获取报价