EPM9560RI304-20N vs EPM9560RI304-15N 对比

详细并排对比 EPM9560RI304-20N 出自 Intel 和 EPM9560RI304-15N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RI304-20N EPM9560RI304-15N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $58.40 $88.75
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (EE PLD), in-system programmable, EEPROM-based
Macrocells 560 560
Usable Gates 12,000 —
Logic Array Blocks (LABs) 35 16
Maximum User I/O Pins 212 —
Pin-to-Pin Propagation Delay (tPD) 20 ns —
Internal Performance Grade 100 MHz —
Supply Voltage (VCCINT/VCCIO) 5.0 V —
Process Technology CMOS EEPROM-based High-performance CMOS, EEPROM configuration memory
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) —
封装 304-pin RQFP (Plastic Quad Flat Pack) RQFP-304 (HFQFP-304), 1.27 mm gull-wing pitch
安装类型 Surface Mount —
工作温度 -40C to +85C (industrial; verify per lot) —
RoHS 状态 Unknown (legacy Altera part - confirm per lot) —
Series / Part Number — EPM9560
Flip-Flops — 772
User I/Os — 216
Maximum Internal Frequency — 145 MHz
Propagation Delay (pin-to-pin) — 15 ns (speed grade -15)
电源电压 — 5.0 V core, multi-volt I/O (3.3 V / 5.0 V)
引脚数量 — 304
Operating Temperature (commercial) — 0 C to 70 C
Programming Interface — JTAG (IEEE 1532 / IEEE 1149.1) in-system programmable
Architecture — Multiple Array MatriX (MAX), third-generation, PIA interconnect
Lead-Free / RoHS — [DATA_NEEDED: lead-free / RoHS status of EPM9560RI304-15N]

数据手册与资源

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