EPM9560WC208-15C vs EPM9560RC208-15C 对比

详细并排对比 EPM9560WC208-15C 出自 Altera 和 EPM9560RC208-15C 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560WC208-15C EPM9560RC208-15C
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $178.00 $0.00
Device Family MAX 9000 —
Series EPM9560 —
Macrocells 560 560
Logic Array Blocks (LABs) 35 —
Flip-Flops 772 —
User I/O Pins 149 149
电源电压 3.3 V or 5 V —
最大时钟频率 117.6 MHz —
Pin-to-Pin Propagation Delay (tPD) 16.6 ns —
Process Technology 0.35 µm CMOS EEPROM —
封装 CQFP-208 (Ceramic Quad Flat Pack) 208-pin RQFP
Terminal Pitch 0.50 mm —
安装类型 Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG —
Operating Temperature Grade C (Commercial) —
MultiVolt I/O Yes (3.3 V / 5 V tolerant) —
RoHS 状态 ROHS3 Compliant [DATA_NEEDED: RoHS status]
湿敏等级(MSL) 3 (168 Hours) —
Family — MAX 9000
Device Type — EEPROM-based CPLD (EPLD)
Usable Gates — 12,000
Propagation Delay (tPD) — 15 ns
Maximum Counter Frequency — 117.6 MHz
Supply Voltage Range — 4.75 V to 5.25 V
Nominal Supply Voltage — 5.0 V
I/O Voltage Compatibility — 3.3 V or 5 V
Configuration Memory — EEPROM (non-volatile)
In-System Programmability — Yes, via IEEE Std. 1149.1 JTAG
工作温度范围 — 0C to +70C (commercial)
Speed Grade — -15 (15 ns)
Logic Architecture — Multiple Array MatriX (MAX) third generation

数据手册与资源

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