H5AN4G6NBJR-PBC vs H5ANAG6NBJR-UHC 对比
详细并排对比 H5AN4G6NBJR-PBC 出自 SK hynix 和 H5ANAG6NBJR-UHC 出自 SK hynix。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | H5AN4G6NBJR-PBC | H5ANAG6NBJR-UHC |
|---|---|---|
| 品牌 | SK hynix | SK hynix |
| 分类 | Memory ICs | DRAM |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $6.60 | $8.09 |
| 存储器类型 | DDR4 SDRAM | DDR4 SDRAM |
| Memory Density | 4 Gbit | — |
| 存储组织 | 256M x 16 (268435456 words x 16 bits) | 256M x 16 |
| Supply Voltage (VDD) | 1.2 V | — |
| 接口 | DDR4 (double data rate, synchronous) | DDR4 (CMOS) |
| Package Code | TFBGA | — |
| 封装 | FBGA-96 (PBGA96), rectangular | PBGA96 / FBGA-96 (TFBGA) |
| Number of Terminals | 96 | — |
| 安装类型 | Surface Mount | — |
| 特性 | Auto self-refresh, data mask, asynchronous reset, dynamic ODT, ZQ calibration, write leveling, CRC | — |
| 工作温度 | [DATA_NEEDED: temperature range for -C grade] | -40C to +95C |
| Data Rate / Speed Grade | [DATA_NEEDED: speed grade PBC data rate] | — |
| CAS 延迟 | [DATA_NEEDED: CAS latency for PBC speed grade] | [DATA_NEEDED: CAS Latency] |
| Process | CMOS | — |
| Lead-Free / Halogen-Free | Yes (per family datasheet, Lead-Free & Halogen-Free) | — |
| Temperature Grade | OTHER (per distributor listing) | — |
| Density | — | 4 Gb |
| Package Dimensions | — | 13 mm length (per JESD-30 R-PBGA-B96) |
| Access Mode | — | Multi Bank, Page Burst |
| Refresh | — | Auto / Self Refresh |
| Data Mask | — | Supported (DM function) |
| Asynchronous Reset | — | Supported |
| On-Chip Termination | — | Dynamic ODT |
| ZQ Calibration | — | Supported |
| Write Leveling | — | Supported |
| CRC | — | Supported |
| Supply Voltage Class | — | DDR4 (1.2 V class) |
| RoHS 状态 | — | RoHS Compliant |
| REACH Compliance | — | Compliant |
| ECCN | — | EAR99 |
| HTS Code | — | 8542.32.00.36 |
| Max Data Rate | — | [DATA_NEEDED: Max Data Rate] |