RTAX2000S-1CGS624V vs RTAX1000SL-CGS624E 对比
详细并排对比 RTAX2000S-1CGS624V 出自 Microchip Technology 和 RTAX1000SL-CGS624E 出自 Microchip Technology。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Microchip Technology
RTAX2000S-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-1CGS624V ✓ 量产中Microchip Technology
RTAX1000SL-CGS624E - 1M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip
RTAX1000SL-CGS624E ✓ 量产中规格对比
| 参数 | RTAX2000S-1CGS624V | RTAX1000SL-CGS624E |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3,950.00 | $3,970.00 |
| Family | RTAX-S Radiation-Tolerant FPGA | RTAX-S/SL Radiation-Tolerant FPGA |
| Equivalent System Gates | 2,000,000 | 1000000 gates |
| Configurable Logic Blocks (CLBs) | 21,504 | 12096 |
| Total Logic Cells | 32,256 | — |
| ASIC Gate Capacity (companion) | 250,000 gates | — |
| Core Supply Voltage (nominal) | 1.5 V | — |
| Core Supply Voltage Range | 1.425 V to 1.575 V | — |
| Logic Family | CMOS | — |
| Speed Grade | -1 | — |
| 工作温度 | -55C to +125C | [DATA_NEEDED: Operating Temperature] |
| 封装 | CG624 Ceramic Column Grid Array (CCGA), 624 balls | 624-ball Ceramic Column Grid Array (CGS624) |
| 安装类型 | Surface Mount | Surface Mount |
| Programming Technology | Antifuse (one-time programmable) | — |
| SEU Hardening | SEU-hardened registers, immune to single-event upsets | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Embedded SRAM with built-in FIFO control logic |
| Configuration | Live at power-up, single-chip (no external config device) | Non-volatile anti-fuse, live-at-power-up, single chip |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS Status] |
| Weight | [DATA_NEEDED: package weight] | — |
| Additional ASIC Gates | — | 125000 gates |
| Maximum System Frequency | — | 581 MHz |
| Process Technology | — | 0.15 um CMOS |
| Core Supply Voltage | — | 1.5 V |
| Radiation Tolerance | — | Radiation-tolerant (space-flight qualified family) |
| Clocking Features | — | Segmentable clocks, chip-wide highway routing |
| Arithmetic Support | — | Dedicated carry logic |
| I/O Count | — | [DATA_NEEDED: User I/O Count] |