S912XET256BCAGR vs S912XDT256F1VAA 对比
详细并排对比 S912XET256BCAGR 出自 NXP Semiconductors 和 S912XDT256F1VAA 出自 NXP Semiconductors。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
NXP Semiconductors
S912XDT256F1VAA - 16-bit HCS12X MCU, 256KB Flash, 80MHz | NXP
S912XDT256F1VAA ✗ 停产规格对比
| 参数 | S912XET256BCAGR | S912XDT256F1VAA |
|---|---|---|
| 品牌 | NXP Semiconductors | NXP Semiconductors |
| 分类 | Microcontrollers | Microcontrollers |
| 生命周期状态 | 有效 | 停产 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $12.11 | $13.60 |
| Product Type | 16-bit HCS12X microcontroller | — |
| Processor Core | S12X | — |
| Maximum CPU Frequency | 50 MHz | — |
| Flash Memory | 256 KB | — |
| Flash Organization | 256K x 8 | — |
| 封装 | 144-LQFP, 20 x 20 mm | — |
| 引脚数量 | 144 pins | 80 |
| 安装类型 | Surface mount | Surface Mount (Gull Wing) |
| 工作温度 | -40°C to +85°C | -40 C to +105 C (Automotive/Industrial) |
| Qualification | Automotive qualified | — |
| Product Category | Microcontrollers - MCU | — |
| Manufacturer | NXP Semiconductors | — |
| 生命周期状态 | Active | — |
| Reference Price | $12.1089 per unit as of 2026-10-21 | — |
| Reported Inventory | 4,800 pieces from Heisener as of 2026-10-21 | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| 电源电压 | [DATA_NEEDED: supply voltage] | — |
| RAM | [DATA_NEEDED: RAM] | 14 KB |
| External Memory Interfaces | [DATA_NEEDED: external memory interfaces] | — |
| Core Architecture | — | HCS12X (S12X CPU + XGATE co-processor) |
| 数据总线宽度 | — | 16-bit |
| CPU Clock Frequency (Max) | — | 80 MHz |
| Program Memory (Flash) | — | 256 KB (256K x 8) |
| EEPROM | — | 4 KB |
| Supply Voltage Range | — | 2.5 V to 5.5 V |
| Package Type | — | 80-QFP (PQFP-80, 14x14 mm) |
| CAN Controllers | — | 2 (CAN 2.0 A/B, msCAN) |
| SPI | — | 3 |
| SCI/UART | — | 8 |
| I2C | — | 2 |
| ADC | — | 16-channel, 10-bit |
| Timers/PWM | — | 8-channel 16-bit (ECT) |
| Debug Interface | — | BDM + JTAG |
| On-chip Voltage Regulator | — | Yes (single 5V supply) |
| Instruction Set Compatibility | — | Upward-compatible with HCS12, enhanced indexed addressing, instruction queue |