SY58052AUMG vs SY58052AUMG-TR 对比
详细并排对比 SY58052AUMG 出自 Microchip Technology 和 SY58052AUMG-TR 出自 Microchip Technology。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Microchip Technology
SY58052AUMG-TR - 10.7Gbps CML Data-Clock Synchronizer | Microchip
SY58052AUMG-TR ✓ 量产中规格对比
| 参数 | SY58052AUMG | SY58052AUMG-TR |
|---|---|---|
| 品牌 | Microchip Technology | Microchip Technology |
| 分类 | Clock & Timing | Clock & Timing |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3.68 | $4.55 |
| 功能 | Ultra-precision CML data and clock synchronizer (resynchronizer) | Ultra-precision CML data and clock synchronizer (retimer) |
| Maximum Data Throughput | > 10.7 Gbps | — |
| Maximum Clock Frequency (fMAX) | > 10.7 GHz | — |
| Any Input to Any Output Delay | 160 ps max | — |
| Input Types | CML, PECL, data inputs | — |
| 输出类型 | CML | Differential CML |
| Supply Voltage Range | 2.375 V to 3.63 V | 2.375 V to 3.63 V |
| 工作温度 | -40C to +85C | -40C to +85C |
| 封装 | 16-VFQFN exposed pad (3x3 mm) | 16-VFQFN (3x3 mm) Exposed Pad |
| 安装类型 | Surface Mount | Surface Mount |
| Product Family | Precision Edge(R) | — |
| Internal Termination | Input and output termination integrated | — |
| Primary Application | Backplane retiming / data-to-clock resynchronization | — |
| RoHS 状态 | [DATA_NEEDED: RoHS Status] | — |
| MSL 等级 | [DATA_NEEDED: MSL Level] | — |
| Maximum Data Rate | — | 10.7 Gbps |
| 最大时钟频率 | — | 10.7 GHz |
| Input Type | — | Differential CML with internal termination (VT pin) |
| Number of Channels | — | 1 |
| Coupling Support | — | AC-coupled and DC-coupled interfaces |
| Termination | — | Internal input and output termination |
| Applications Category | — | ATM/SONET/SDH support circuit |
| Terminal Form | — | No lead |
| Package Code | — | HVQCCN (square) |
| Temperature Grade | — | Industrial |