XC2C64A-5CP56C vs XC2C64A-7CP56C 对比

详细并排对比 XC2C64A-5CP56C 出自 AMD 和 XC2C64A-7CP56C 出自 AMD。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

AMD
XC2C64A-5CP56C XC2C64A-5CP56C - 64-Macrocell 1.8V CPLD | AMD

XC2C64A-5CP56C - 64-Macrocell 1.8V CPLD | AMD

XC2C64A-5CP56C ✓ 量产中

规格对比

参数 XC2C64A-5CP56C XC2C64A-7CP56C
品牌 AMD AMD
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
Device Type CoolRunner-II complex programmable logic device (CPLD) CoolRunner-II complex programmable logic device
Number of Macrocells 64 —
Logic Elements or Blocks 4 —
User I/O Pins 45 —
Total Terminals 56 —
Maximum Pin-to-Pin Propagation Delay 4.6 ns —
Internal Frequency 333 MHz 333 MHz
Internal Supply Voltage Range 1.7 V to 1.9 V —
System Optimization Voltage 1.8 V —
Logic Family CMOS CMOS
Process Technology 0.18 micron CMOS 0.18 µm CMOS
Programmable Type In-system programmable —
Package Type 56-ball CSP/LFBGA CSP-56, 6 x 6 mm, 0.50 mm pitch
Package Dimensions 6 x 6 mm —
Ball Pitch 0.50 mm —
Temperature Grade Commercial —
静态电流 15 A as reported in the verified search summary 15 µA
RoHS 状态 [DATA_NEEDED: RoHS status] —
REACH Status [DATA_NEEDED: REACH status] —
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification status] [DATA_NEEDED: AEC-Q100 status]
工作温度范围 [DATA_NEEDED: operating temperature range] —
Macrocell Count — 64 macrocells
Equivalent Logic Capacity — 1.5K gates
Propagation Delay — 5 ns
Pin-to-Pin Logic Delay — 4.6 ns
User I/O Count — 45 I/Os
Core Supply Voltage — 1.8 V
引脚数量 — 56 pins
安装类型 — Chip-scale surface-mount package
工作温度 — [DATA_NEEDED: operating temperature range]
RoHS Compliance — [DATA_NEEDED: RoHS status]
REACH Compliance — [DATA_NEEDED: REACH status]

数据手册与资源

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