AD4083BCPZ - 16-Bit 40MSPS SAR ADC | Analog Devices
料号： AD4083BCPZ ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $44.94 | $44.94 |
| 10 | $42 | $420.00 |
| 100 | $38 | $3,800.00 |
| 500 | $34 | $17,000.00 |
| 1,000 | $30 | $30,000.00 |
AD4083BCPZ 概述
An ADC (analog-to-digital converter) is an electronic device that converts a continuous analog signal into a discrete digital representation. The AD4083 is a SAR ADC, which uses a successive approximation algorithm to determine the digital output bit by bit. SAR ADCs are known for their high resolution, low power, and fast conversion times, making them suitable for applications such as medical imaging, communications, and industrial data acquisition. The AD4083 is part of the broader class of data converters, which are essential in bridging the analog and digital domains in electronic systems.
Key features of the AD4083 include a signal-to-noise and distortion (SINAD) ratio greater than 90 dBFS, ensuring excellent dynamic performance. The device operates from a single 1.8 V analog supply and a 1.8 V digital interface supply, with power dissipation typically below 100 mW at 40 MSPS. The integrated LDO regulators allow the ADC to generate its own internal supply rails, simplifying power supply design. The 16K FIFO reduces the need for high-speed data transfer to the host processor, enabling efficient data capture in burst-mode applications.
The AD4083 is available in a 49-ball CSPBGA (5x5 mm) package, which is compact and suitable for space-constrained designs. The device is specified for operation over the industrial temperature range of -40°C to +125°C. It is recommended for new designs, indicating active lifecycle status. The AD4083 is ideal for applications such as medical ultrasound, radar systems, and high-speed data acquisition, where high resolution and low power are critical.
When designing with the AD4083, it is important to provide a clean, low-noise analog supply and a stable reference voltage. The integrated LDO regulators help, but external decoupling is still recommended. The Easy Drive architecture reduces the need for a high-bandwidth input driver, but a suitable driver amplifier may still be required for optimal performance. The FIFO can be used to buffer data and reduce the interrupt load on the host processor.
直接替换替代料： AD4083BCPZ ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： AD4083BCPZ （相同外形与封装尺寸） ——差异在于 Resolution, Package, Input Type, Sampling Rate, Architecture.
快速对比工具——选择替代料号进行并排对比：
AD4083BBCZ
✅ 直接替换📋 参考替代料（不在目录中）
AD4086BCPZ
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$19 / 个
查看数据手册 →AD7384-4BCPZ
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$11.05 / 个
查看数据手册 →AD7383-4BCPZ
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$30.5 / 个
查看数据手册 →AD4052BCPZ
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$6.1 / 个
查看数据手册 →AD4083BCPZ 最大额定值与电气特性
| 分辨率 | 16 bits |
| 采样率 | 40 MSPS |
| Architecture | SAR |
| Number of Inputs | 1 |
| Input Type | Single-ended |
| SINAD | > 90 dBFS |
| Analog Supply Voltage | 1.8 V |
| Digital Supply Voltage | 1.8 V |
| Power Dissipation | < 100 mW at 40 MSPS |
| Integrated Reference Buffer | Yes |
| Integrated LDO Regulators | Yes |
| FIFO Size | 16K |
| 封装 | 49-CSPBGA (5x5 mm) |
| 工作温度范围 | -40°C to +125°C |
| 生命周期状态 | Active (Recommended for New Designs) |
AD4083BCPZ 引脚配置
| 引脚 A1 | AVDD — Analog supply voltage (1.8V) |
| 引脚 A2 | AVSS — Analog ground |
| 引脚 A3 | VREF — Reference voltage input |
| 引脚 A4 | REFBUF — Reference buffer output |
| 引脚 A5 | AIN — Analog input |
| 引脚 B1 | DVDD — Digital supply voltage (1.8V) |
| 引脚 B2 | DGND — Digital ground |
| 引脚 B3 | SCLK — Serial clock input |
| 引脚 B4 | SDI — Serial data input |
| 引脚 B5 | SDO — Serial data output |
| 引脚 C1 | CS — Chip select (active low) |
| 引脚 C2 | BUSY — Busy indicator output |
| 引脚 C3 | FIFO_RDY — FIFO ready output |
| 引脚 C4 | RESET — Reset input |
| 引脚 C5 | PD — Power-down input |
典型应用
AD4083BCPZ 适用于 6 应用s: Medical Ultrasound, Radar Systems, High-Speed Data Acquisition, Communications, Industrial Data Acquisition, Test and Measurement.
Medical Ultrasound
The AD4083BCPZ is ideal for medical ultrasound systems due to its 16-bit resolution, 40 MSPS sampling rate, and low noise (SINAD > 90 dBFS). It enables high-quality imaging while consuming less than 100 mW, which is critical for portable devices. The integrated LDO regulators simplify power supply design, and the 16K FIFO reduces host processor load during high-speed data capture. The Easy Drive architecture minimizes input drive requirements, allowing direct connection to ultrasound transducers with minimal external components.
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Radar Systems
In radar systems, the AD4083BCPZ provides high-speed, high-resolution digitization of IF signals. Its 40 MSPS sampling rate and 16-bit resolution enable accurate target detection and range resolution. The low power dissipation (<100 mW) is beneficial for phased-array radar modules where thermal management is critical. The integrated FIFO allows burst-mode data capture, reducing the real-time processing burden on the digital signal processor. The Easy Drive architecture simplifies the interface to the analog front-end, reducing component count and board space.
推荐
High-Speed Data Acquisition
The AD4083BCPZ is well-suited for high-speed data acquisition systems in test and measurement equipment. Its 16-bit resolution and 40 MSPS sampling rate capture fast transients with high fidelity. The low power consumption enables dense multi-channel designs without excessive heat generation. The integrated reference buffer and LDO regulators reduce external component count, simplifying PCB layout. The 16K FIFO supports burst-mode acquisition, allowing the host processor to read data at a lower rate, which is ideal for oscilloscopes and spectrum analyzers.
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Communications
In communications systems, the AD4083BCPZ digitizes IF signals in software-defined radios and base stations. Its high SINAD (>90 dBFS) ensures excellent signal-to-noise ratio, critical for demodulating weak signals. The 40 MSPS sampling rate supports wideband signals, and the low power consumption is advantageous for remote radio heads. The integrated FIFO reduces data transfer overhead, enabling efficient interface to FPGAs or DSPs. The Easy Drive architecture simplifies the analog front-end, reducing design complexity.
推荐
Industrial Data Acquisition
The AD4083BCPZ is suitable for industrial data acquisition systems that require high resolution and speed, such as vibration analysis and condition monitoring. Its 16-bit resolution and 40 MSPS sampling rate capture detailed waveforms, while the low power consumption allows for compact, fanless designs. The wide operating temperature range (-40°C to +125°C) ensures reliability in harsh environments. The integrated LDO regulators and reference buffer reduce external components, making it easier to design robust, space-constrained systems.
推荐
Test and Measurement
The AD4083BCPZ is ideal for test and measurement equipment such as digital oscilloscopes and spectrum analyzers. Its 16-bit resolution and 40 MSPS sampling rate provide high dynamic range and fast waveform capture. The low power dissipation enables portable, battery-operated instruments. The integrated FIFO allows efficient data transfer to the display processor, reducing latency. The Easy Drive architecture simplifies input buffering, reducing the need for high-bandwidth amplifiers, which lowers cost and board space.
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推荐产品汇总
工程参考数据： AD4083BCPZ ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | AD4083BBCZ | AD4086BCPZ | AD7384-4BCPZ |
|---|---|---|---|---|
| Package | 49-CSPBGA (5x5 mm) | 49-CSPBGA (5x5 mm) | 49-CSPBGA (5x5 mm) | 49-CSPBGA (5x5 mm) |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 16 bits | 16 bits | 16 bits | 16 bits |
| Sampling Rate | 40 MSPS | 40 MSPS | 50 MSPS | 4 MSPS (per channel) |
| Number of Channels | 1 | 1 | 1 | 4 |
| SINAD | > 90 dBFS | > 90 dBFS | > 90 dBFS | > 90 dBFS |
| Power Dissipation | < 100 mW | < 100 mW | < 120 mW | < 150 mW |
| Integrated FIFO | 16K | 16K | 16K | None |
关键差异点
- Integrated LDO regulators and reference buffer （对比 AD4083BBCZ)
- Higher sampling rate （对比 AD4052BCPZ)
- Integrated 16K FIFO （对比 AD7384-4BCPZ)
设计说明
The AD4083BCPZ operates from a single 1.8V analog supply and a 1.8V digital supply. The integrated LDO regulators generate internal rails, but external decoupling capacitors are still required on the AVDD and DVDD pins. Use 0.1uF and 10uF capacitors in parallel, placed as close to the pins as possible, to ensure stable operation and minimize noise.
For optimal performance, use a solid ground plane and separate analog and digital ground areas, connecting them at a single point. The 49-CSPBGA package has a 5x5 mm footprint; ensure adequate thermal vias under the exposed pad for heat dissipation. Route the analog input and reference traces away from digital traces to reduce coupling.
Do not exceed the absolute maximum ratings for supply voltages. Ensure the reference voltage is stable and low-noise; the integrated reference buffer helps, but an external reference may be needed for higher accuracy. The Easy Drive architecture reduces input drive requirements, but a driver amplifier with sufficient bandwidth is still recommended for high-frequency signals. The FIFO should be configured correctly to avoid data overflow.
合规信息
Compliance information based on Analog Devices standard product compliance. RoHS and REACH compliant per ADI policy. Not AEC-Q100 qualified.