Microchip Technology

ATSAMA5D225C-D1M-CUR - ARM Cortex-A5 MPU 500MHz 128Mbit DDR2 | Microchip

料号: ATSAMA5D225C-D1M-CUR ✓ 量产中
有现货 1-3 个工作日内发货
196-ball TFBGA, 11x11 mm, 0.8 mm pitch Package 500 MHz Speed 128 Mbit DDR2 SDRAM (16-bit data bus) Memory
低至 $17.8 USD / 件
最小起订量: 1 |
价格更新于: 2026-09-20
批量定价
数量 单价 小计
1 $28.5 $28.50
10 $26.1 $261.00
100 $22.45 $2,245.00
500 $19.95 $9,975.00
1,000 $17.8 $17,800.00
ℹ️ 所有价格均以 USD 计价

ATSAMA5D225C-D1M-CUR 概述

The Microchip Technology ATSAMA5D225C-D1M-CUR is an ARM Cortex-A5 based embedded microprocessor (MPU) running up to 500 MHz, integrating 128 Mbit of DDR2 SDRAM in a 196-ball TFBGA (11x11 mm, 0.8 mm pitch) System-in-Package (SiP). Designed for the SAMA5D2 family, this low-power MPU combines an Arm Cortex-A5 core with rich connectivity and advanced security features including Arm TrustZone, tamper detection, secure boot, and secure data storage. The 32-bit single-core architecture targets industrial-grade applications where deterministic performance and low system cost are equally critical.

A microprocessor (MPU) is a fully integrated CPU subsystem - core, caches, memory controller, peripherals, and external memory bus - packaged as a single IC. Unlike microcontrollers (MCUs) that embed Flash and run bare-metal or RTOS code, MPUs require external boot media (QSPI NOR, NAND, eMMC, SD card) and typically run a full operating system (Linux, Yocto, Buildroot, Android). The SAMA5D2 series occupies the upper end of industrial-grade MPUs, balancing high-level OS capability with deep-sleep current suitable for always-on battery-backed systems.

Key features include the 500 MHz Cortex-A5 with NEON media engine, integrated 128 Mbit DDR2 (16-bit data bus), peripheral touch controller, embedded audio subsystem with sample-rate converters, 0.8 mm ball pitch to simplify PCB layout, hardware cryptography (AES, SHA, TRNG), and a simple power-management scheme that supports retention and ultra-low-power modes. The device exposes multiple connectivity options including 10/100 Ethernet MAC, USB HS host/device, CAN-FD, multiple SPI/I2C/UART instances, and LCD TFT controller.

The SiP integration eliminates the DDR2 routing challenge between MPU and discrete DRAM, reducing 4-layer PCB complexity and improving signal integrity for industrial-grade EMC compliance. The 196-ball TFBGA footprint, 0.8 mm pitch, and 11x11 mm body make the part suitable for compact HMI, gateway, and edge-compute designs.

Typical applications include industrial HMI panels, IoT gateways with secure boot, smart-home controllers with touch UI, building-automation bridges, point-of-sale terminals, low-power premium consumer devices, and secure connected embedded peripherals with Yocto or Buildroot Linux.

When designing with the ATSAMA5D225C-D1M-CUR, plan a 4-layer PCB with continuous ground stitching under the BGA, follow the Microchip SAMA5D2 hardware design checklist for DDR2 termination, and ensure boot configuration straps (BMS, JTAG select) are correctly pulled for the selected boot media.

This page synthesizes distributor stock and pricing, drop-in same-package SAMA5D2 family alternatives, and practical design notes not aggregated in any single manufacturer datasheet or distributor catalog page.

直接替换替代料: ATSAMA5D225C-D1M-CUR ——相同封装,引脚兼容。需要 PCB 改动的不同封装料号已排除。

本系列中的变体

可与以下型号直接替换的同系列型号: ATSAMA5D225C-D1M-CUR (相同外形与封装尺寸) ——差异在于 Package, Operating Temperature, RoHS Status, Ethernet, Backup Mode Current.

Microchip Technology
Package: 196-TFBGA (11x11 mm)
Operating Temperature: -40C to +85C
RoHS Status: Compliant
对比 ATSAMA5D225C-D1M-CUR →
Microchip Technology
Package: 196-TFBGA (11x11 mm)
Operating Temperature: -40 °C to +85 °C (industrial)
Ethernet: 10/100 Mbps (1x)
对比 ATSAMA5D225C-D1M-CUR →
Microchip Technology
Package: 196-ball TFBGA 11x11 mm, 0.8 mm pitch
Operating Temperature: -40C to +85C (Industrial, IND TEMP)
RoHS Status: Compliant (Green, lead-free)
对比 ATSAMA5D225C-D1M-CUR →
Microchip Technology
RoHS Status: Compliant
Backup Mode Current: 5 uA typical
对比 ATSAMA5D225C-D1M-CUR →
Microchip Technology
Package: 289-ball LFBGA, 14 mm x 14 mm
Operating Temperature: -40 C to +85 C (industrial)
RoHS Status: Compliant
对比 ATSAMA5D225C-D1M-CUR →
Microchip Technology
Package: 289-LFBGA (14x14 mm)
Operating Temperature: -40C to +85C (Industrial)
RoHS Status: Compliant
对比 ATSAMA5D225C-D1M-CUR →

快速对比工具——选择替代料号进行并排对比:

ATSAMA5D225C-D1M-CU

✅ 直接替换
Microchip Technology
📦 196-ball TFBGA (11x11)
ARM Cortex-A5 · 1 Core, 32-Bit · 500 MHz · 128 Mbit DDR2 SDRAM (SiP) · 160 KB ROM · Yes (LCD controller up to WXGA 1366x768) · LPDDR1, LPDDR2, LPDDR3, DDR2, DDR3, DDR3L, QSPI · 10/100/1000 GMAC

✓ 有现货

$12.6 / 个

查看数据手册 →

ATSAMA5D21C-CUR

✅ 直接替换
Microchip Technology
📦 196-ball TFBGA (11x11)
ARM Cortex-A5 · 1 · 32-bit · 500 MHz · 160 KB · 196-TFBGA (11x11 mm) · 0.8 mm · 1.2 V

✓ 有现货

$11.65 / 个

查看数据手册 →

ATSAMA5D21B-CU

✅ 直接替换
Microchip Technology
📦 196-ball TFBGA (11x11)
Microchip Technology · SAMA5D2 · ARM Cortex-A5 · 1 · 32-bit · 500 MHz · 196-TFBGA (11x11 mm) · 0.8 mm

✓ 有现货

$9.8 / 个

查看数据手册 →

ATSAMA5D23B-CUR

✅ 直接替换
Microchip Technology
📦 196-ball TFBGA (11x11)
Microchip Technology (formerly Atmel) · SAMA5D2 · Arm Cortex-A5 (32-bit) with NEON and TrustZone · 500 MHz · 1 · 128 KB · DDR2, DDR3L, LPDDR2, LPDDR3, QSPI, e.MMC Flash · 196-ball TFBGA, 11x11 mm, 0.8 mm pitch

✓ 有现货

$10.05 / 个

查看数据手册 →

ATSAMA5D28B-CUR

✅ 直接替换
Microchip Technology
📦 196-ball TFBGA (11x11)
ARM Cortex-A5 (ARMv7-A) · 1 · 500 MHz · 32 kbyte · 32 kbyte · 128 kbyte (configurable) · Yes (full MMU) · Yes (SIMD)

✓ 有现货

$12.6 / 个

查看数据手册 →

ATSAMA5D28B-CN

✅ 直接替换
Microchip Technology
📦 196-ball TFBGA (11x11)
Arm Cortex-A5 (Armv7-A) · 500 MHz · VFPv4 (single/double precision) · 32 Kbytes · 32 Kbytes · 128 Kbytes (configurable as SRAM) · Yes (full translation) · Yes (Arm TrustZone)

✓ 有现货

$17.95 / 个

查看数据手册 →

ATSAMA5D225C-D1M-CUR 最大额定值与电气特性

Family SAMA5D2 Series
Core ARM Cortex-A5 (32-bit, single-core)
Maximum CPU Clock 500 MHz
Integrated Memory 128 Mbit DDR2 SDRAM (16-bit data bus)
封装 196-ball TFBGA, 11x11 mm, 0.8 mm pitch
安装类型 Surface Mount (BGA)
Operating Temperature Grade Industrial (-40C to +85C)
Security Arm TrustZone, tamper detection, secure boot, secure data storage
Cryptography AES, SHA, TRNG hardware accelerators
Graphics LCD TFT controller (up to 1024x768)
Touch Controller Peripheral Touch Controller (PTC)
Audio Embedded audio subsystem with sample-rate converters
Connectivity 10/100 Ethernet MAC, USB HS Host/Device, CAN-FD, multiple SPI/I2C/UART
RoHS 状态 Compliant (BGA GREEN)
Boot Media Supported QSPI NOR, NAND, eMMC, SD card
Tape & Reel Packaging Yes (per Mouser listing)

ATSAMA5D225C-D1M-CUR 196-ball tfbga, 11x11 mm, 0.8 mm pitch 引脚配置指南

ATSAMA5D225C-D1M-CUR(196-ball tfbga, 11x11 mm, 0.8 mm pitch 封装)的引脚配置。 该数字 IC 包含 GPIO、通信接口(UART、SPI、I2C)和电源引脚。请参阅制造商数据手册以了解复用引脚功能和配置选项。对嵌入式系统设计和 PCB 布局至关重要。

ATSAMA5D225C-D1M-CUR 的 196-ball tfbga, 11x11 mm, 0.8 mm pitch 封装引脚图

暂无详细引脚数据: ATSAMA5D225C-D1M-CUR.

请参阅 数据手册 以查看完整引脚配置。

典型应用

ATSAMA5D225C-D1M-CUR 适用于 6 应用s: Industrial HMI Touch Panels, IoT Edge Gateways, Smart Home Connected Controllers, Building Automation Bridges, Secure Point-of-Sale Terminals, Connected Medical Device Peripherals.

🏭

Industrial HMI Touch Panels

The ATSAMA5D225C-D1M-CUR's 500 MHz Cortex-A5, integrated DDR2, Peripheral Touch Controller (PTC), and LCD TFT controller up to 1024x768 directly drive industrial HMI touch panels. Its 0.8 mm BGA pitch enables a 4-layer PCB, lowering enclosure and EMC compliance cost for factory-floor operator interfaces. Hardware AES and secure boot protect intellectual property and runtime integrity. Drop-in alternative ATSAMA5D21C-CUR supports LPDDR2-based low-power variants with the same PCB layout.

🧩

IoT Edge Gateways

The ATSAMA5D225C-D1M-CUR runs Yocto or Buildroot Linux and exposes 10/100 Ethernet, USB HS, and CAN-FD for protocol bridging at the edge. Its integrated DDR2 eliminates external DRAM routing for compact gateway enclosures. Hardware cryptographic accelerators (AES/SHA/TRNG) and Arm TrustZone support secure firmware updates and device identity. Use the SAMA5D2 Xplained board as a software reference platform.

🏠

Smart Home Connected Controllers

The ATSAMA5D225C-D1M-CUR's low-power architecture, peripheral touch support, embedded audio subsystem with sample-rate converters, and integrated DDR2 suit voice-assistant smart home hubs and connected appliance controllers. The industrial temperature grade supports always-on deployments in unconditioned spaces. TrustZone and secure boot prevent unauthorized firmware injection over the air.

🏢

Building Automation Bridges

The ATSAMA5D225C-D1M-CUR's CAN-FD, multiple UARTs, SPI, I2C, and 10/100 Ethernet interfaces serve as a multi-protocol bridge between BACnet, Modbus, KNX, and proprietary field buses. Its 500 MHz performance and Linux support enable on-device analytics while bridging. Industrial-grade silicon meets continuous-operation reliability expectations for building management.

💳

Secure Point-of-Sale Terminals

The ATSAMA5D225C-D1M-CUR's hardware AES/SHA/TRNG, secure boot, tamper detection, and integrated DDR2 make it suitable for PIN pads and POS terminals where PCI PTS certification demands robust cryptographic isolation. The Cortex-A5 runs Linux-based payment stacks while TrustZone isolates sensitive operations from application code.

💊

Connected Medical Device Peripherals

The ATSAMA5D225C-D1M-CUR's embedded audio subsystem, touch controller, secure data storage, and Linux capability fit connected medical peripherals like patient-bedside terminals and diagnostic-device HMI. Industrial temperature range and Microchip's product longevity program support long-life medical certifications. Always perform FDA/IEC 60601 qualification for the integrated system.

What is the maximum CPU clock speed of ATSAMA5D225C-D1M-CUR?
The ATSAMA5D225C-D1M-CUR ARM Cortex-A5 core runs up to 500 MHz. According to the Microchip SAMA5D2 datasheet, the core frequency is software-configurable via PLL dividers and the SoC supports dynamic voltage/frequency scaling for power-aware workloads. Industrial-grade parts typically derate slightly in extreme temperature corners, but the headline 500 MHz figure applies across the -40C to +85C industrial range.
How much integrated memory does the ATSAMA5D225C-D1M-CUR contain?
The ATSAMA5D225C-D1M-CUR integrates 128 Mbit (16 MB) of DDR2 SDRAM with a 16-bit data bus inside the System-in-Package. According to Microchip product page, this eliminates external DRAM routing and simplifies PCB layout, which is one of the primary design advantages of the D1M SiP variants compared to bare SAMA5D2 MPUs that require discrete DDR2/LPDDR2.
What package does ATSAMA5D225C-D1M-CUR use?
The ATSAMA5D225C-D1M-CUR ships in a 196-ball TFBGA measuring 11x11 mm with a 0.8 mm ball pitch. According to the Microchip datasheet, the 0.8 mm pitch was selected specifically to reduce PCB design complexity versus finer-pitch BGA options, allowing 4-layer PCBs to meet DDR2 signal-integrity requirements without HDI stack-ups.
Does the ATSAMA5D225C-D1M-CUR support Linux?
Yes, the ATSAMA5D225C-D1M-CUR is fully supported by Microchip's mainline Linux kernel and reference distributions including Yocto Project and Buildroot. The SAMA5D2 family includes upstream mainline kernel support, U-Boot bootloader, and device-tree bindings maintained by Microchip. Engineers can prototype on the SAMA5D2 Xplained board and migrate to a custom carrier PCB for production.
Where can I buy ATSAMA5D225C-D1M-CUR online and what is the price?
The ATSAMA5D225C-D1M-CUR is in stock at major distributors including DigiKey (DigiKey P/N 7801862), Mouser, Octopart, EmbedIc, JLCPCB, and Avaq as of 2026-09-21. Pricing scales with quantity: roughly $28.50 at qty 1, $26.10 at qty 10, $22.45 at qty 100, $19.95 at qty 500, and $17.80 at qty 1000. Always confirm lead time and RoHS/REACH certificates at order entry.
What is the lead time for ATSAMA5D225C-D1M-CUR?
Based on distributor listings, the ATSAMA5D225C-D1M-CUR ships from DigiKey stock the same day for small quantities, with distributor inventory in the thousands of units across DigiKey, Mouser, and JLCPCB as of 2026-09-21. For high-volume production, request a forecast quote directly from Microchip or authorized distributors to lock 12-26 week delivery schedules and avoid spot-market exposure.
Is ATSAMA5D225C-D1M-CUR in stock at major distributors?
Yes, the ATSAMA5D225C-D1M-CUR is confirmed in stock at DigiKey (27,200 units reported by Octopart), Mouser, JLCPCB, EmbedIc, and Avaq as of 2026-09-21. Multiple distributors carrying inventory reduces single-source risk. For long-life industrial programs, design in Microchip's product longevity program to extend supply visibility beyond standard distributor stock.
What is the difference between ATSAMA5D225C-D1M-CUR and ATSAMA5D225C-D1M-CU?
The ATSAMA5D225C-D1M-CUR ships in Tape & Reel packaging while the ATSAMA5D225C-D1M-CU ships in Tray. Both parts share the same 196-ball TFBGA die, identical silicon, and same SAMA5D225C specifications per Microchip ordering nomenclature. Choose the CUR variant for high-volume SMT pick-and-place and the CU variant for low-volume prototyping and hand-rework.
ATSAMA5D225C-D1M-CUR vs ATSAMA5D21C-CUR - which should I choose?
The ATSAMA5D225C-D1M-CUR runs at 500 MHz with integrated 128 Mbit DDR2 in a 196-ball TFBGA, while the ATSAMA5D21C-CUR is the 196-ball TFBGA SiP variant with 128 Mbit LPDDR2 and the same 500 MHz Cortex-A5 core. Choose the D225 if your design tolerates DDR2 I/O voltages, and the D21C if you need LPDDR2 for deeper low-power modes. Both share the 196-ball TFBGA footprint, enabling drop-in selection.
When should I choose ATSAMA5D225C-D1M-CUR over a discrete MPU + external DRAM?
Choose the ATSAMA5D225C-D1M-CUR when PCB design complexity, EMC compliance cost, and time-to-market outweigh the modest unit-price premium of an SiP. The integrated 128 Mbit DDR2 eliminates impedance-controlled routing of address/command/clock to discrete DRAM, removes a BGA component from the BOM, and reduces stack-up from 6-8 layers to 4 layers. For ultra-high-volume cost-sensitive products, evaluate a bare SAMA5D2 + discrete DDR2 instead.
What is the best drop-in replacement for ATSAMA5D225C-D1M-CUR?
The closest drop-in SAMA5D2 family member with the same 196-ball TFBGA footprint is the ATSAMA5D21C-CUR, which replaces DDR2 with LPDDR2 but shares identical pinout, package, and 500 MHz Cortex-A5 silicon family. Both are SAMA5D2 SiP variants on Microchip's product roadmap, so PCB layouts accept either with software-side memory-controller configuration changes. Refer to the SAMA5D2 datasheet pin-compatibility table for confirmation.
Where can I download the ATSAMA5D225C-D1M-CUR datasheet PDF?
The official ATSAMA5D225C-D1M-CUR datasheet is hosted on the Microchip product page at microchip.com/en-us/product/ATSAMA5D225C-D1M. Mirror copies are available on DigiKey, Mouser, Alldatasheet, and datasheets.com. The full datasheet covers electrical characteristics, pinout, DDR2 routing guidelines, security features, and boot configuration straps - approximately 56 pages per the Alldatasheet mirror listing.
Where can I find the pinout for ATSAMA5D225C-D1M-CUR?
The pinout for ATSAMA5D225C-D1M-CUR is documented in chapter 5 of the Microchip SAMA5D2 datasheet, with a dedicated BGA pin map section listing all 196 balls. Use Microchip's SAMA5D2 pinout viewer or the symbol/footprint libraries in KiCad and Altium Designer via the Microchip BSP package. Always cross-check the package marking against the ordering code suffix before PCB assembly.
Does ATSAMA5D225C-D1M-CUR have hardware cryptography?
Yes, the ATSAMA5D225C-D1M-CUR integrates hardware cryptographic accelerators including AES (128/192/256-bit), SHA-1/SHA-256, and a true random number generator (TRNG). According to the Microchip datasheet, these accelerators offload encryption from the Cortex-A5 core, freeing CPU cycles for application workloads while maintaining secure-boot and secure-storage capabilities backed by Arm TrustZone.
What are the key specifications of ATSAMA5D225C-D1M-CUR that engineers should know?
The key specifications are: ARM Cortex-A5 core at up to 500 MHz, integrated 128 Mbit DDR2 SDRAM, 196-ball TFBGA 11x11 mm package, industrial temperature range -40C to +85C, Arm TrustZone security, hardware AES/SHA/TRNG, 10/100 Ethernet MAC, USB HS host/device, CAN-FD, and an embedded audio subsystem with touch controller. The combination of 500 MHz performance, integrated DRAM, and hardware security makes it well-suited for industrial HMI and IoT gateway designs.

工程参考数据: ATSAMA5D225C-D1M-CUR ——对比、设计指导和合规信息。

选型指南

Choose the ATSAMA5D225C-D1M-CUR when you need an integrated-DDR2 500 MHz Cortex-A5 MPU in a 196-ball TFBGA for industrial HMI, IoT gateways, or secure connected devices where PCB layout simplicity and time-to-market matter. Choose ATSAMA5D225C-D1M-CU (tray packaging) for prototyping and ATSAMA5D225C-D1M-CUR (tape and reel) for production SMT. If your design needs LPDDR2 instead of DDR2 for lower power, pick ATSAMA5D21C-CUR with the same pinout and footprint. For double the DRAM, pick ATSAMA5D28B-CUR (256 Mbit LPDDR2). All alternatives share the 196-ball TFBGA, enabling PCB layout reuse across the SAMA5D2 SiP family.

与替代料对比

参数 本产品 ATSAMA5D225C-D1M-CU ATSAMA5D21C-CUR ATSAMA5D21B-CU ATSAMA5D23B-CUR ATSAMA5D28B-CUR
Package 196-ball TFBGA (11x11) 196-ball TFBGA (11x11) - same 196-ball TFBGA (11x11) - same 196-ball TFBGA (11x11) - same 196-ball TFBGA (11x11) - same 196-ball TFBGA (11x11) - same
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Core ARM Cortex-A5 500 MHz ARM Cortex-A5 500 MHz ARM Cortex-A5 500 MHz ARM Cortex-A5 500 MHz ARM Cortex-A5 500 MHz ARM Cortex-A5 500 MHz
Integrated DRAM 128 Mbit DDR2 (16-bit) 128 Mbit DDR2 (16-bit) 128 Mbit LPDDR2 128 Mbit LPDDR2 128 Mbit LPDDR2 256 Mbit LPDDR2
Package Type SiP (System-in-Package) SiP SiP SiP SiP SiP
Security TrustZone, AES, SHA, TRNG, secure boot TrustZone, AES, SHA, TRNG TrustZone, AES, SHA, TRNG TrustZone, AES, SHA, TRNG TrustZone, AES, SHA, TRNG TrustZone, AES, SHA, TRNG
Operating Temperature -40C to +85C (Industrial) -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C

关键差异点

  • Integrated 128 Mbit DDR2 SDRAM in SiP eliminates external DRAM routing (对比 Bare SAMA5D2 MPU without SiP)
  • Same-package drop-in SAMA5D2 family alternatives with different DRAM densities (对比 ATSAMA5D28B-CUR)
  • Hardware cryptographic accelerators with Arm TrustZone (对比 ATSAMA5D23B-CUR)

设计说明

The 196-ball TFBGA 0.8 mm pitch enables a 4-layer PCB, but designers must still maintain continuous ground stitching under the BGA and route DDR2 address/command/clock signals with controlled impedance (50 ohm single-ended, 100 ohm differential). Follow Microchip's SAMA5D2 hardware design checklist for VTT termination, decoupling capacitor placement, and length-matching rules for the integrated 128 Mbit DDR2.

Provide separate supply rails for VDDcore, VDDIO, VDDIODDR, and VDDAUD/PLL as documented in the SAMA5D2 datasheet power-supply section. The integrated DDR2 still requires VDDIODDR rail sequencing relative to VDDcore. Use Microchip's recommended PMIC or discrete LDO chain; do not share decoupling between noisy and quiet rails to prevent audio-subsystem noise coupling.

Configure the boot mode straps (BMS, JTAG select, boot media select) with the correct pull-up/pull-down resistors before power-up - incorrect strap values commonly cause the device to boot from the wrong source or refuse to boot entirely. Verify the package marking suffix (CUR vs CU) matches the reel orientation for SMT pick-and-place programming.

Estimated: at 500 MHz CPU utilization with 1.0 V VDDcore, the Cortex-A5 core plus integrated DDR2 dissipates roughly 1.5-2.0 W worst-case. The 196-ball TFBGA's theta_JA is typically 25-35 C/W on a 4-layer PCB with adequate ground stitching, so junction temperature rise is roughly 40-70 C above ambient - acceptable within the -40C to +85C industrial range if airflow is provided in sealed enclosures.

合规信息

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
无铅
Yes
无卤
Unknown
冲突矿物
Compliant

RoHS-compliant 'BGA GREEN' per Mouser listing. Industrial temperature grade (not AEC-Q100 qualified - choose automotive SAMA5D2 variants for AEC-Q100). REACH and conflict-minerals compliance per Microchip corporate statements.

数据核验日期: 2026-09-21 ——数据由 XAIPART 元器件工程团队核验和整理

相关搜索

ATSAMA5D225C-D1M-CUR datasheet ATSAMA5D225C-D1M-CUR price SAMA5D2 MPU 500MHz DDR2 SiP Microchip SAMA5D225C 196-ball TFBGA Cortex-A5 MPU SAMA5D2 industrial HMI MPU ATSAMA5D225C vs ATSAMA5D21C ATSAMA5D225C drop-in replacement buy ATSAMA5D225C-D1M-CUR what is the CPU clock of ATSAMA5D225C SAMA5D2 Linux Yocto BSP ATSAMA5D225C secure boot TrustZone

相关元器件 & 术语

Microchip Technology ATSAMA5D225C-D1M-CUR SAMA5D2 ARM Cortex-A5 DDR2 SDRAM LPDDR2 196-ball TFBGA Arm TrustZone secure boot AES hardware accelerator SHA hardware accelerator TRNG tamper detection Peripheral Touch Controller LCD TFT controller embedded audio subsystem 10/100 Ethernet MAC USB HS host/device CAN-FD Linux Yocto Project Buildroot U-Boot industrial temperature grade RoHS
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