ATSAMA5D35A-CN - 536MHz Cortex-A5 MPU, 324-LFBGA | Microchip
料号： ATSAMA5D35A-CN ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $12.48 | $12.48 |
| 10 | $11.23 | $112.30 |
| 100 | $10.12 | $1,012.00 |
| 500 | $9.05 | $4,525.00 |
| 1,000 | $8.2 | $8,200.00 |
ATSAMA5D35A-CN 概述
A microprocessor (MPU) is an integrated circuit that contains a full CPU core, memory management, and a rich set of peripherals, distinguishing it from a microcontroller (MCU) which typically integrates on-chip flash for code storage. The SAMA5D3 family belongs to the ARM Cortex-A5 application-processor hierarchy (Cortex-A5 -> 32-bit RISC application core -> ARMv7-A -> MPU) and is widely deployed where deterministic real-time response combined with a rich operating system such as Linux or Android is required. The MPU category sits above microcontrollers in the embedded computing taxonomy and below application processors designed for higher-end consumer devices.
Key differentiating features of the ATSAMA5D35A-CN include the integrated LCD controller supporting up to WXGA (1280x768) TFT panels, a dual 10/100 Ethernet MAC with IEEE 1588 hardware timestamping, two high-speed USB 2.0 ports (one host, one device), and a hardware encryption accelerator supporting AES, 3DES, and SHA. The device includes a 12-bit ADC, up to six UARTs, multiple I2C and SPI controllers, and a 32-bit DDR2/LPDDR/LPDDR2 memory controller, providing a complete system-on-chip solution.
Architecturally, the ATSAMA5D35A-CN uses a single-issue, in-order Cortex-A5 core with NEON and FPU pipelines, paired with a multi-layer AHB bus matrix that allows concurrent DMA, LCD, and Ethernet traffic without CPU intervention. The 160 KB ROM supports secure boot, while external 16-bit DDR2/LPDDR memory is supported through the dedicated controller, enabling large Linux workloads. Power consumption is optimized through multiple low-power modes including ULP0 (less than 1 mA retained state) and the dynamic clock gating per peripheral.
Typical applications include industrial human-machine interfaces (HMIs) with TFT LCD panels, building automation gateways with dual Ethernet, point-of-sale terminals with secure boot and encryption, smart energy gateways supporting IEC 61850 protocols, and medical patient monitors requiring low-noise analog front-ends. The combination of hardware cryptography, dual Ethernet, and an LCD controller makes it well suited to substation automation and factory-floor operator interfaces.
When designing with this device, ensure the PCB layout uses the controlled-impedance DDR2 interface routing guidelines from the SAMA5D3 datasheet, with matched-length traces for clock, address, and data signals. Decoupling must include at least 100 uF bulk capacitance plus high-frequency 100 nF capacitors at each power pin, and the exposed-die substrate connection must be soldered to a continuous ground plane for thermal dissipation.
This page synthesizes distributor pricing, drop-in SAMA5D3 family alternatives, and practical layout guidance not duplicated in the Microchip datasheet, supporting faster design-in and procurement decisions.
直接替换替代料： ATSAMA5D35A-CN ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： ATSAMA5D35A-CN （相同外形与封装尺寸） ——差异在于 Package, Ethernet, USB, LCD Controller, Core Architecture.
快速对比工具——选择替代料号进行并排对比：
ATSAMA5D34A-CU
✅ 直接替换✓ 有现货
$9.62 / 个
查看数据手册 →ATSAMA5D34A-CUR
✅ 直接替换✓ 有现货
$17.6 / 个
查看数据手册 →ATSAMA5D31A-CU
✅ 直接替换✓ 有现货
$5.65 / 个
查看数据手册 →ATSAMA5D31A-CUR
✅ 直接替换✓ 有现货
$12.85 / 个
查看数据手册 →ATSAMA5D28B-CUR
✅ 直接替换✓ 有现货
$12.6 / 个
查看数据手册 →ATSAMA5D28B-CNR
✅ 直接替换✓ 有现货
$17.9 / 个
查看数据手册 →ATSAMA5D35A-CN 最大额定值与电气特性
| Manufacturer | Microchip Technology |
| Series | SAMA5D3 |
| Core Processor | ARM Cortex-A5 |
| Number of Cores / Bus Width | 1 Core / 32-Bit |
| Maximum CPU Clock | 536 MHz |
| Instruction Cache | 32 KB |
| Data Cache | 32 KB |
| Internal SRAM | 128 KB |
| Internal ROM | 160 KB |
| Floating Point Unit | Yes (VFPv4 + NEON) |
| 封装 | 324-LFBGA (15x15 mm) |
| Memory Controller | 16-bit DDR2 / LPDDR / LPDDR2 |
| LCD Controller | Up to WXGA (1280x768), 24-bit |
| Ethernet | 2x 10/100 MAC with IEEE 1588 |
| USB | 2x USB 2.0 High-Speed (Host + Device) |
| Hardware Crypto Accelerator | AES, 3DES, SHA, TRNG |
| ADC | 12-bit, up to 12 channels |
| UART / SPI / I2C | Up to 6 / 4 / 3 |
| 工作温度 | -40C to +85C (Extended Industrial) |
| 电源电压 | 1.08 V core, 3.3 V I/O |
| 安装类型 | Surface Mount |
| MSL 等级 | 3 (168 hours) |
| RoHS 状态 | Compliant |
ATSAMA5D35A-CN 324-lfbga (15x15 mm) 引脚配置指南
ATSAMA5D35A-CN（324-lfbga (15x15 mm) 封装）的引脚配置。 该数字 IC 包含 GPIO、通信接口（UART、SPI、I2C）和电源引脚。请参阅制造商数据手册以了解复用引脚功能和配置选项。对嵌入式系统设计和 PCB 布局至关重要。
暂无详细引脚数据： ATSAMA5D35A-CN.
请参阅 数据手册 以查看完整引脚配置。
典型应用
ATSAMA5D35A-CN 适用于 6 应用s: Industrial Human-Machine Interface (HMI) with TFT LCD, Building Automation Gateway with Dual Ethernet, Point-of-Sale (POS) Terminal with Secure Boot, Smart Energy Substation Gateway (IEC 61850), Medical Patient Monitor with Low-Noise Analog Front End, Factory-Floor Operator Panel with EtherCAT Slave.
Industrial Human-Machine Interface (HMI) with TFT LCD
The ATSAMA5D35A-CN is purpose-built for industrial HMIs that combine a 7- to 10-inch TFT panel with real-time operator input. Its integrated LCD controller supports WXGA (1280x768) at 24 bpp with hardware overlay layers, enabling on-screen alpha-blended menus without CPU load. The 536 MHz Cortex-A5 core with NEON accelerates SVG rendering and Qt/Embedded GUI workflows, while 128 KB of internal SRAM gives the Linux kernel a deterministic fast-path for input events. Compared to using an external LCD bridge IC, the on-chip controller saves BOM cost and PCB area, and the dual 10/100 Ethernet MACs allow the HMI to also serve as a Modbus TCP gateway on the factory floor.
推荐
Building Automation Gateway with Dual Ethernet
Building automation controllers require multiple fieldbus segments to coexist with BACnet/IP uplink traffic, which the ATSAMA5D35A-CN handles with two independent 10/100 Ethernet MACs. Each MAC supports IEEE 1588 hardware timestamping, critical for synchronizing HVAC schedules and lighting scenes across the building. The hardware encryption accelerator (AES, 3DES, SHA) offloads TLS handshakes for secure cloud telemetry, and the 160 KB secure-boot ROM verifies the Linux kernel image before execution. With DDR2 support up to 1 Gbit, the gateway can host a local trend-logging database for several months of HVAC data.
推荐
Point-of-Sale (POS) Terminal with Secure Boot
POS terminals require PCI PTS compliance, which mandates hardware-based secure boot and end-to-end transaction encryption. The ATSAMA5D35A-CN 160 KB on-chip ROM contains the secure-bootloader that verifies a signed U-Boot image before the main Linux kernel is loaded, preventing unauthorized firmware from booting. The hardware AES engine then accelerates EMV chip-card cryptographic operations, keeping CPU usage low even during peak contactless transaction bursts. The 12-bit ADC supports the resistive touch-panel sensing, while the integrated LCD controller drives the customer-facing display, eliminating the need for a separate graphics co-processor.
推荐
Smart Energy Substation Gateway (IEC 61850)
Substation automation gateways built on the ATSAMA5D35A-CN can run the IEC 61850 protocol stack on Linux with hardware timestamping accurate to within 100 ns, enabling precise GOOSE messaging between Intelligent Electronic Devices (IEDs). The dual Ethernet ports support the PRP (Parallel Redundancy Protocol) zero-loss redundancy required by IEC 61850-3. The extended industrial temperature range (-40 to +85 C) allows deployment in unconditioned outdoor cabinets, and the hardware crypto engine accelerates TLS for SCADA backhaul links. Compared to using a soft-core PLC processor, the Cortex-A5 at 536 MHz leaves ample headroom for protocol translation and local HMI rendering.
推荐
Medical Patient Monitor with Low-Noise Analog Front End
Patient monitors demand both deterministic real-time response for alarm processing and rich graphics for waveform display, a combination the ATSAMA5D35A-CN delivers through its Cortex-A5 core and integrated LCD controller. The 12-bit ADC at up to 12 channels supports multi-lead ECG acquisition directly, while the hardware floating-point unit accelerates digital filter computations for SpO2 plethysmography and NIBP trend analysis. Medical IEC 60601-1 isolation barriers can be implemented using the UART/SPI lines to communicate with the isolated front-end module, and the secure-boot ROM enforces HIPAA-compliant firmware integrity checks at every power-up.
推荐
Factory-Floor Operator Panel with EtherCAT Slave
Operator panels deployed next to industrial robots must combine a touch-driven HMI with deterministic fieldbus communication, which the ATSAMA5D35A-CN supports by exposing SPI to an external EtherCAT slave controller such as the LAN9252. The Cortex-A5 at 536 MHz runs the Qt/Embedded HMI stack while the SPI-connected LAN9252 handles the 100 Mbit EtherCAT downlink, achieving sub-millisecond cycle times. The DDR2 controller hosts a large enough frame buffer for 24-bit animated schematics, and the extended industrial temperature range permits mounting inside the robot control cabinet.
推荐
推荐产品汇总
工程参考数据： ATSAMA5D35A-CN ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | ATSAMA5D34A-CU | ATSAMA5D31A-CU | ATSAMA5D28B-CU | ATSAMA5D28B-CNR |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 324-LFBGA (15x15 mm) | 324-LFBGA (15x15 mm) - same | 324-LFBGA (15x15 mm) - same | 324-LFBGA (15x15 mm) - same | 324-LFBGA (15x15 mm) - same |
| LCD Controller | Yes (WXGA) | Yes (WXGA) | No | No | No |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
关键差异点
- Integrated WXGA LCD controller eliminates external bridge IC （对比 ATSAMA5D31A-CU)
- Higher CPU clock than the lower-cost 400 MHz variant （对比 ATSAMA5D34A-CU)
- On-chip 160 KB secure-boot ROM with AES/3DES accelerator （对比 ATSAMA5D28B-CU)
设计说明
The DDR2 memory controller is the most critical interface to lay out. Route all 16-bit data, address, and clock traces with matched length (target +/- 25 mil tolerance), 50-ohm controlled impedance on the top layer with reference to an unbroken ground plane, and series-stubs disabled. Use via-in-pad on the inner-row BGA balls to break out to the DDR2 footprint, and provide 100-ohm differential termination on the DDR2 clock pair within 200 mil of the ATSAMA5D35A-CN. Failure to follow these guidelines typically manifests as intermittent U-Boot CRC errors or Linux kernel panics during boot.
Provide at least 100 uF of bulk decoupling at the 1.2 V core rail plus 100 nF MLCC capacitors within 100 mil of every VDDCORE pin. The 1.2 V core supply must reach its nominal voltage within 10 ms to avoid internal POR reset glitches; if a soft-start ramp is used, configure the MIC23350 or equivalent PMIC for a 5 ms rise time. Keep the 3.3 V I/O and 1.8 V DDR2 supplies separate and decouple them locally to prevent switching noise from coupling into the analog PLL block.
Although the ATSAMA5D35A-CN is rated to 85 C ambient, sustained workloads at 536 MHz with DDR2 traffic and dual Ethernet can drive junction temperature 20 to 30 C above ambient due to the BGA package's theta_JA of approximately 25 C/W. Provide a continuous ground plane on the layer directly beneath the BGA and stitch vias on a 1 mm grid to spread heat into inner copper layers. Forced-air cooling is recommended in sealed enclosures.
Place the two 25 MHz crystal oscillators (one for the main oscillator, one for the RTC) within 5 mm of the XIN/XOUT and RTCKIN/RTCKOUT pins respectively. Keep the RTC crystal traces short and guarded by a ground ring to avoid coupling mains-frequency noise into the real-time clock. The LAN8740A or KSZ8081 Ethernet PHYs should be placed within 50 mm of the ATSAMA5D35A-CN RMII signals with the 50 MHz reference clock trace length-matched to within 50 mil.
Do not omit the external 32.768 kHz RTC crystal even if the system does not require RTC functionality; the secure-boot ROM and the low-power ULP0 mode both depend on it for the slow clock domain. Also, do not leave the JTAG pins floating in production: either disable the JTAG boundary scan in the boot configuration word or pull TMS high and TCK low through 10 kohm resistors to prevent accidental debug-entry at boot.
合规信息
RoHS and lead-free confirmed by Microchip product page (GREEN, MRL A markings). REACH compliance statement available via Microchip support. AEC-Q100 not applicable (this is an MPU, not an automotive-qualified MCU); automotive-grade MPU options should be confirmed with Microchip directly.
