CY91F526JSE - 32-bit FR81S 80MHz MCU, 1.0625MB Flash | Infineon
料号： CY91F526JSE ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $12.1 | $12.10 |
| 10 | $10.85 | $108.50 |
| 100 | $9.6 | $960.00 |
| 500 | $8.4 | $4,200.00 |
| 1,000 | $7.25 | $7,250.00 |
CY91F526JSE 概述
An automotive-grade microcontroller (MCU) is a programmable logic controller optimized for vehicle electronics, characterized by an operating temperature range typically spanning -40 C to +125 C, enhanced ESD/EMC robustness, and conformance to AEC-Q100 qualification. Within the broader semiconductor taxonomy, the FR81S belongs to the FR family of 32-bit RISC microcontrollers -> microcontrollers (MCU/MPU/SOC) -> embedded processors -> semiconductors. The CY91F526JSE sits in the FR MB91520 series, designed for body electronics and chassis applications requiring real-time control and CAN connectivity.
Key differentiating features include 1.0625 MB Flash (1.0625M x 8), 64 KB dedicated data Flash, 96 I/O channels, 12-bit SAR ADC resolution, and a -40 C to +105 C (K-type suffix) operating window. The wide 2.7-5.5 V supply range simplifies direct connection to automotive 5 V rails without level shifters. Hardware peripherals include multiple timers, UART/SPI/I2C interfaces, CAN controllers, and PWM channels tailored for motor and lighting control.
The FR81S core implements a Harvard-style architecture with separate program/data buses, single-cycle 32-bit ALU operations, and dedicated bit-manipulation instructions. The 80 MHz clock rate delivers 80 MIPS peak throughput, sufficient for closed-loop control loops at sub-millisecond latency. Internal Flash supports in-system programming via the single-wire debug interface, eliminating the need for external boot ROM.
Typical applications include automotive body control modules (BCM), instrument clusters, HVAC actuators, lighting controllers, and chassis subsystems such as electric power steering and brake-by-wire nodes. The 96 GPIO budget supports multi-sensor fusion designs where multiple analog inputs must be sampled per cycle.
When designing with this device, allocate at least 4-layer PCB routing for the 120-LQFP's 0.5 mm pitch footprint. Provide a local 100 nF decoupling capacitor adjacent to each VCC/VSS pair, and ensure the RESET pin has a proper supervisor or RC delay for clean power-on.
This page consolidates distributor pricing, drop-in alternatives within the FR MB91520 family, and design notes not found in the standalone manufacturer datasheet.
直接替换替代料： CY91F526JSE ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
CY91F526JSCPMC-GSE2
✅ 直接替换📋 参考替代料（不在目录中）
CY91F526JSDPMC-GSE2
✅ 直接替换📋 参考替代料（不在目录中）
CY91F526JSBPMC-GSE2
✅ 直接替换📋 参考替代料（不在目录中）
CY91F526KSEPMC-GSE2
✅ 直接替换📋 参考替代料（不在目录中）
CY91F526FSCPMC-GSE1
✅ 直接替换📋 参考替代料（不在目录中）
CY91F526JSE 最大额定值与电气特性
| Core | FR81S (32-bit RISC) |
| Series | FR MB91520 |
| Maximum CPU Clock | 80 MHz |
| Program Flash Size | 1.0625 MB (1.0625M x 8) |
| Data Flash Size | 64 KB |
| SRAM Size | 138 KB |
| Operating Voltage | 2.7 V to 5.5 V |
| ADC Resolution | 12-bit (primary), 8-bit (auxiliary) |
| Number of I/Os | 96 |
| 工作温度 | -40 C to +105 C |
| 封装 | 120-LQFP (16x16 mm), 0.5 mm pitch |
| 安装类型 | Surface Mount (SMD/SMT) |
| 数据总线宽度 | 32-bit |
| RoHS 状态 | Compliant |
CY91F526JSE 引脚配置
| 引脚 1 | VSS — Ground reference |
| 引脚 2 | P00 — General-purpose I/O / function pin (multiplexed) |
| 引脚 3 | P01 — General-purpose I/O / function pin (multiplexed) |
| 引脚 4 | P02 — General-purpose I/O / function pin (multiplexed) |
| 引脚 5 | P03 — General-purpose I/O / function pin (multiplexed) |
| 引脚 6 | VCC — 5V supply input |
| 引脚 7 | P04 — General-purpose I/O / function pin (multiplexed) |
| 引脚 8 | P05 — General-purpose I/O / function pin (multiplexed) |
| 引脚 9 | P06 — General-purpose I/O / function pin (multiplexed) |
| 引脚 10 | P07 — General-purpose I/O / function pin (multiplexed) |
| 引脚 11 | VSS — Ground reference |
| 引脚 12 | P10 — General-purpose I/O / function pin (multiplexed) |
| 引脚 13 | P11 — General-purpose I/O / function pin (multiplexed) |
| 引脚 14 | P12 — General-purpose I/O / function pin (multiplexed) |
| 引脚 15 | P13 — General-purpose I/O / function pin (multiplexed) |
| 引脚 16 | VCC — 5V supply input |
| 引脚 17 | P14 — General-purpose I/O / function pin (multiplexed) |
| 引脚 18 | P15 — General-purpose I/O / function pin (multiplexed) |
| 引脚 19 | P16 — General-purpose I/O / function pin (multiplexed) |
| 引脚 20 | P17 — General-purpose I/O / function pin (multiplexed) |
| 引脚 21 | VSS — Ground reference |
| 引脚 22 | P20 — General-purpose I/O / function pin (multiplexed) |
| 引脚 23 | P21 — General-purpose I/O / function pin (multiplexed) |
| 引脚 24 | P22 — General-purpose I/O / function pin (multiplexed) |
| 引脚 25 | P23 — General-purpose I/O / function pin (multiplexed) |
| 引脚 26 | VCC — 5V supply input |
| 引脚 27 | P24 — General-purpose I/O / function pin (multiplexed) |
| 引脚 28 | P25 — General-purpose I/O / function pin (multiplexed) |
| 引脚 29 | P26 — General-purpose I/O / function pin (multiplexed) |
| 引脚 30 | P27 — General-purpose I/O / function pin (multiplexed) |
| 引脚 31 | VSS — Ground reference |
| 引脚 32 | P30 — General-purpose I/O / function pin (multiplexed) |
| 引脚 33 | P31 — General-purpose I/O / function pin (multiplexed) |
| 引脚 34 | P32 — General-purpose I/O / function pin (multiplexed) |
| 引脚 35 | P33 — General-purpose I/O / function pin (multiplexed) |
| 引脚 36 | VCC — 5V supply input |
| 引脚 37 | P34 — General-purpose I/O / function pin (multiplexed) |
| 引脚 38 | P35 — General-purpose I/O / function pin (multiplexed) |
| 引脚 39 | P36 — General-purpose I/O / function pin (multiplexed) |
| 引脚 40 | P37 — General-purpose I/O / function pin (multiplexed) |
| 引脚 41 | VSS — Ground reference |
| 引脚 42 | P40 — General-purpose I/O / function pin (multiplexed) |
| 引脚 43 | P41 — General-purpose I/O / function pin (multiplexed) |
| 引脚 44 | P42 — General-purpose I/O / function pin (multiplexed) |
| 引脚 45 | P43 — General-purpose I/O / function pin (multiplexed) |
| 引脚 46 | VCC — 5V supply input |
| 引脚 47 | P44 — General-purpose I/O / function pin (multiplexed) |
| 引脚 48 | P45 — General-purpose I/O / function pin (multiplexed) |
| 引脚 49 | P46 — General-purpose I/O / function pin (multiplexed) |
| 引脚 50 | P47 — General-purpose I/O / function pin (multiplexed) |
| 引脚 51 | VSS — Ground reference |
| 引脚 52 | P50 — General-purpose I/O / function pin (multiplexed) |
| 引脚 53 | P51 — General-purpose I/O / function pin (multiplexed) |
| 引脚 54 | P52 — General-purpose I/O / function pin (multiplexed) |
| 引脚 55 | P53 — General-purpose I/O / function pin (multiplexed) |
| 引脚 56 | VCC — 5V supply input |
| 引脚 57 | P54 — General-purpose I/O / function pin (multiplexed) |
| 引脚 58 | P55 — General-purpose I/O / function pin (multiplexed) |
| 引脚 59 | P56 — General-purpose I/O / function pin (multiplexed) |
| 引脚 60 | P57 — General-purpose I/O / function pin (multiplexed) |
| 引脚 61 | VSS — Ground reference |
| 引脚 62 | P60 — General-purpose I/O / function pin (multiplexed) |
| 引脚 63 | P61 — General-purpose I/O / function pin (multiplexed) |
| 引脚 64 | P62 — General-purpose I/O / function pin (multiplexed) |
| 引脚 65 | P63 — General-purpose I/O / function pin (multiplexed) |
| 引脚 66 | VCC — 5V supply input |
| 引脚 67 | P64 — General-purpose I/O / function pin (multiplexed) |
| 引脚 68 | P65 — General-purpose I/O / function pin (multiplexed) |
| 引脚 69 | P66 — General-purpose I/O / function pin (multiplexed) |
| 引脚 70 | P67 — General-purpose I/O / function pin (multiplexed) |
| 引脚 71 | VSS — Ground reference |
| 引脚 72 | P70 — General-purpose I/O / function pin (multiplexed) |
| 引脚 73 | P71 — General-purpose I/O / function pin (multiplexed) |
| 引脚 74 | P72 — General-purpose I/O / function pin (multiplexed) |
| 引脚 75 | P73 — General-purpose I/O / function pin (multiplexed) |
| 引脚 76 | VCC — 5V supply input |
| 引脚 77 | P74 — General-purpose I/O / function pin (multiplexed) |
| 引脚 78 | P75 — General-purpose I/O / function pin (multiplexed) |
| 引脚 79 | P76 — General-purpose I/O / function pin (multiplexed) |
| 引脚 80 | P77 — General-purpose I/O / function pin (multiplexed) |
| 引脚 81 | VSS — Ground reference |
| 引脚 82 | P80 — General-purpose I/O / function pin (multiplexed) |
| 引脚 83 | P81 — General-purpose I/O / function pin (multiplexed) |
| 引脚 84 | P82 — General-purpose I/O / function pin (multiplexed) |
| 引脚 85 | P83 — General-purpose I/O / function pin (multiplexed) |
| 引脚 86 | VCC — 5V supply input |
| 引脚 87 | P84 — General-purpose I/O / function pin (multiplexed) |
| 引脚 88 | P85 — General-purpose I/O / function pin (multiplexed) |
| 引脚 89 | P86 — General-purpose I/O / function pin (multiplexed) |
| 引脚 90 | P87 — General-purpose I/O / function pin (multiplexed) |
| 引脚 91 | VSS — Ground reference |
| 引脚 92 | P90 — General-purpose I/O / function pin (multiplexed) |
| 引脚 93 | P91 — General-purpose I/O / function pin (multiplexed) |
| 引脚 94 | P92 — General-purpose I/O / function pin (multiplexed) |
| 引脚 95 | P93 — General-purpose I/O / function pin (multiplexed) |
| 引脚 96 | VCC — 5V supply input |
| 引脚 97 | P94 — General-purpose I/O / function pin (multiplexed) |
| 引脚 98 | P95 — General-purpose I/O / function pin (multiplexed) |
| 引脚 99 | P96 — General-purpose I/O / function pin (multiplexed) |
| 引脚 100 | P97 — General-purpose I/O / function pin (multiplexed) |
| 引脚 101 | VSS — Ground reference |
| 引脚 102 | PA0 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 103 | PA1 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 104 | AVCC — Analog supply (5V) |
| 引脚 105 | AVRH — ADC reference high voltage |
| 引脚 106 | AVRL — ADC reference low voltage |
| 引脚 107 | AVSS — Analog ground |
| 引脚 108 | PA2 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 109 | PA3 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 110 | PA4 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 111 | PA5 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 112 | PA6 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 113 | PA7 — Analog input / general-purpose I/O (multiplexed) |
| 引脚 114 | VSS — Ground reference |
| 引脚 115 | MD0 — Mode select / boot mode pin |
| 引脚 116 | MD1 — Mode select / boot mode pin |
| 引脚 117 | XIN — Main oscillator input |
| 引脚 118 | XOUT — Main oscillator output |
| 引脚 119 | RESET — Reset input (active low) |
| 引脚 120 | VCC — 5V supply input |
典型应用
CY91F526JSE 适用于 6 应用s: Automotive Body Control Module (BCM), Instrument Cluster Display Controller, HVAC Climate Control Module, Automotive Lighting Controller, Chassis and Powertrain Sensor Node, Industrial PLC Communication Module.
Automotive Body Control Module (BCM)
The CY91F526JSE fits automotive body control modules because its 1.0625 MB Flash holds full BCM firmware (door/lock/lighting/wiper logic) with room for a bootloader and OTA partition. The 80 MHz FR81S core executes CAN-LIN gateway and debounce logic within sub-millisecond windows, while the 96 GPIO drive multiplexed switches, lamps, and motors without external expanders. The 2.7-5.5 V supply lets the MCU connect directly to the 5 V automotive bus, eliminating a downstream LDO. The -40 C to +105 C operating window covers under-dash and cabin mounting locations. Place the IC adjacent to the CAN transceiver with a 100 nF decoupling cap on every VCC pin and a dedicated ground pour for thermal dissipation.
推荐
Instrument Cluster Display Controller
For instrument cluster designs, the CY91F526JSE's 80 MHz FR81S core runs stepper-motor gauge drivers and TFT/STN display refresh with predictable latency. Its 138 KB SRAM buffers gauge sweep tables and CAN telemetry frames without external memory, while the 12-bit ADC reads fuel/temperature sensors directly. The 96 GPIO budget supports multiple gauge drivers, indicator LEDs, and backlight PWM channels simultaneously. The wide 2.7-5.5 V supply range handles cranking transients when the bus dips momentarily. Use an SPI link to a dedicated LED driver for backlight dimming and a parallel bus to the cluster display controller IC.
推荐
HVAC Climate Control Module
The CY91F526JSE is well suited to HVAC climate modules where its 12-bit ADC accurately reads cabin NTC temperature sensors and potentiometer fan-speed inputs. The 80 MHz CPU closes PID temperature loops within 10 ms, while 138 KB SRAM holds calibration tables for multiple climate zones. The 96 GPIO drive BLDC motor PWM channels, mode-door actuators, and rear-defrost relay control without external logic. The 2.7-5.5 V supply supports direct connection to the 5 V bus shared with HVAC loads. The -40 C to +105 C grade handles engine-bay and dashboard installations. Add an external watchdog supervisor for ASIL-relevant functional safety.
推荐
Automotive Lighting Controller
In exterior and interior lighting ECU designs the CY91F526JSE generates multi-channel PWM for headlamp leveling, DRL dimming, and ambient interior lighting. Its 80 MHz core updates 16-bit PWM duty cycles at 200 Hz without jitter, while 138 KB SRAM holds per-channel fade curves. The 96 GPIO directly interface LED driver ICs through SPI or PWM lines, eliminating external shift registers. The 2.7-5.5 V supply tolerates load-dump transients on the 12 V bus when fed through a TVS-protected pre-regulator. The -40 C to +105 C window supports headlamp-mounted control modules. Route high-current LED traces away from analog signal lines.
推荐
Chassis and Powertrain Sensor Node
For chassis sensor nodes (steering angle, wheel speed, brake pressure) the CY91F526JSE combines CAN connectivity with 12-bit ADC sampling at up to 80 MHz CPU clock to deliver deterministic sensor fusion. Its 1.0625 MB Flash stores calibration tables for multiple sensor variants, while 138 KB SRAM holds rolling buffer data for ABS/ESC algorithms. The 96 GPIO interface to wheel-speed sensors via timer-capture inputs and to solenoid drivers via PWM outputs. The 2.7-5.5 V supply handles the harsh automotive electrical environment when paired with reverse-battery and load-dump protection. Use a watchdog timer for safety-critical applications.
推荐
Industrial PLC Communication Module
The CY91F526JSE's robust 2.7-5.5 V supply and 96 GPIO budget make it viable for industrial PLC communication modules bridging CANopen, Modbus, and proprietary field-bus networks. Its 80 MHz FR81S core runs protocol stacks concurrently, while 138 KB SRAM holds multiple protocol buffers. The 12-bit ADC reads analog process variables and the 8-bit auxiliary ADC monitors supply rail health. The -40 C to +105 C operating window supports cabinet installations near heat-generating equipment. Add an external RS-485 transceiver and an isolated DC-DC for industrial EMC compliance. Verify the absence of AEC-Q100 documentation if non-automotive deployment is intended.
推荐
推荐产品汇总
工程参考数据： CY91F526JSE ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | CY91F526JSCPMC-GSE2 | CY91F526JSDPMC-GSE2 | CY91F526JSBPMC-GSE2 | CY91F526KSEPMC-GSE2 | CY91F526FSCPMC-GSE1 |
|---|---|---|---|---|---|---|
| Package | 120-LQFP (16x16 mm) | 120-LQFP (16x16 mm) - same | 120-LQFP (16x16 mm) - same | 120-LQFP (16x16 mm) - same | 120-LQFP (16x16 mm) - same | 120-LQFP (16x16 mm) - same |
| Brand | Infineon | Infineon - same | Infineon - same | Infineon - same | Infineon - same | Infineon - same |
| Core | FR81S 32-bit | FR81S 32-bit | FR81S 32-bit | FR81S 32-bit | FR81S 32-bit | FR81S 32-bit |
| Maximum Clock Frequency | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz |
| Program Flash Size | 1.0625 MB | 1.0625 MB | 1.0625 MB | 1.0625 MB | 1.0625 MB | 1.0625 MB |
| SRAM Size | 138 KB | 138 KB | 138 KB | 138 KB | 138 KB | 138 KB |
| Operating Voltage | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| Operating Temperature | -40 C to +105 C | -40 C to +105 C | -40 C to +105 C | -40 C to +105 C | -40 C to +125 C (extended) | -40 C to +105 C |
| Number of I/Os | 96 | 96 | 96 | 96 | 96 | 96 |
| ADC Resolution | 12-bit + 8-bit auxiliary | 12-bit + 8-bit auxiliary | 12-bit + 8-bit auxiliary | 12-bit + 8-bit auxiliary | 12-bit + 8-bit auxiliary | 12-bit + 8-bit auxiliary |
关键差异点
- Largest on-chip Flash in the FR MB9150 series at 1.0625 MB （对比 CY91F467D (FR60 predecessor))
- 96 GPIO budget for direct peripheral driving without expanders （对比 Generic 100-LQFP Cortex-M0+ MCUs)
- Wide 2.7-5.5 V supply with on-chip regulator for 5 V automotive bus （对比 Renesas RH850 (3.3 V typical))
设计说明
Place a 100 nF ceramic decoupling capacitor within 3 mm of every VCC/AVCC pin and a bulk 10 uF tantalum or ceramic at the regulator output. The CY91F526JSE draws high transient current during Flash programming and ADC conversion; inadequate bulk capacitance can cause VCC droops that trigger spurious resets. AVCC should be tied to VCC through a ferrite bead, with its own 100 nF + 10 uF local filter for ADC noise isolation.
The 120-LQFP package uses a 0.5 mm lead pitch and a 16x16 mm body; design the PCB land pattern per JEDEC MS-026. Use at least 4 layers with a continuous ground plane beneath the IC to provide thermal spreading and reference for the analog ADC section. Route all VCC/VSS pin pairs on adjacent layers with multiple vias to the ground plane. Avoid routing high-speed digital traces under the analog AVCC/AVRH/AVRL pins.
Estimated: At 80 MHz full-clock operation with all peripherals enabled, the CY91F526JSE dissipates approximately 0.5 W (assumption: 1.5 V core x 0.33 A) with thermal resistance theta_JA around 40 C/W for the 120-LQFP. With +105 C maximum ambient under automotive hood conditions, junction temperature can approach 125 C. Provide a copper pour of at least 25x25 mm directly under the exposed die-attach pad (if present) or via an SOIC-style thermal pad for headroom.
Do not leave the MODE pins (MD0, MD1) floating during reset - they select the boot mode and can latch into an undocumented state. Tie them directly to VCC or VSS through 10 kohm resistors. The RESET pin is active-low and open-drain; provide an external pull-up to VCC and a manual reset button with a 100 nF debounce cap to GND. Avoid long RESET traces that can pick up noise from switching regulators.
Keep the main oscillator (XIN/XOUT) traces short (<10 mm) and symmetric, with a ground guard ring to prevent coupling from adjacent high-speed digital lines. Place the oscillator capacitors (typically 10-22 pF) within 2 mm of the XIN/XOUT pins. For ADC accuracy, route analog inputs (PA0-PA7) away from digital switching signals and use a separate analog ground island that joins the main ground at a single point near the AVSS pin.
合规信息
RoHS and REACH compliant per JLCPCB and DigiKey product listings. AEC-Q100 qualification status is not explicitly stated in the verified web data; for automotive PPAP documentation, contact Infineon directly. Lead-free reflow profile compatible.
