ISL95833BIRTZ - Dual 2+1 PWM Controller, IMVP-7/VR12 | Renesas
料号： ISL95833BIRTZ ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $5.02 | $5.02 |
| 10 | $4.52 | $45.20 |
| 100 | $3.85 | $385.00 |
| 500 | $3.15 | $1,575.00 |
| 1,000 | $2.65 | $2,650.00 |
ISL95833BIRTZ 概述
A PWM controller is the central feedback element in a multiphase synchronous buck converter: it senses the output voltage, compares it with the internal DAC reference commanded by the IMVP-7/VR12 SVID bus, and modulates the duty cycle of each phase to regulate the core voltage of a CPU or GPU under rapidly changing load conditions. The ISL95833B's R3 modulation provides faster transient response than traditional voltage-mode or current-mode controllers by injecting ripple-compensation current directly into the modulator, which is critical for the sub-microsecond load steps generated by modern mobile CPUs entering and exiting low-power states (P-states, C-states).
Key features include differential remote-sense inputs for accurate regulation at the load, programmable per-phase current limiting with inductor DCR sensing, automatic phase-dropping at light load, OVP/UVP/OCP protection, and a thermal-shutdown block. The device communicates with the processor through the Intel VR12/IMVP-7 serial VID (SVID) interface, accepting 8-bit VID codes plus commands such as SetVID, SetPS, and Slew-Rate. The exposed-pad QFN-32 package delivers a low thermal resistance suitable for the notebook thermal envelope.
Typical applications include ultrabook and notebook CPU core rails, IMVP-7 compliant tablet SoC supplies, and integrated graphics (iGPU) rails where two rails must be regulated from one controller. The part also fits ultrathin laptop platforms that demand a single-controller solution to reduce BOM count and PCB area versus a two-controller design.
When designing with the ISL95833B, lay out the boot/boot-mid capacitors, SVID pull-ups, and the IMON summing network per the reference schematic in the datasheet, and verify DrMOS compatibility because the ISL95833B's integrated driver targets specific Renesas/Intersil DrMOS families. A 4-layer PCB with a solid ground plane under the exposed pad is required to keep junction temperature within the 125 C operating limit.
直接替换替代料： ISL95833BIRTZ ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
ISL95833BIRTZ-T
✅ 直接替换📋 参考替代料（不在目录中）
ISL95833IRTZ
✅ 直接替换📋 参考替代料（不在目录中）
ISL95833BIRTZ 最大额定值与电气特性
| 拓扑 | Dual 2+1 multiphase PWM controller |
| Modulation Scheme | Robust Ripple Regulator (R3) |
| Compliance | Intel IMVP-7 / VR12 |
| 输出数量 | 2 (VR1 + VR2) |
| VR1 Phase Configuration | 2-phase or 1-phase |
| VR2 Phase Configuration | 1-phase |
| Switching Frequency Range | 400 kHz to 600 kHz |
| 输出电压范围 | 0.25 V to 1.52 V |
| 最大输出电流 | 60 A (system, with external DrMOS) |
| VID Interface | Intel SVID / IMVP-7 serial VID |
| Current Sensing | Inductor DCR sensing with NTC thermistor compensation |
| Integrated Gate Driver | Yes (one rail) |
| Protection Features | OVP, UVP, OCP, OTP |
| 封装 | 32-QFN (4x4 mm) with exposed thermal pad |
| 安装类型 | Surface Mount |
| RoHS 状态 | Compliant |
ISL95833BIRTZ 32-qfn (4x4 mm) with exposed thermal pad 引脚配置指南
ISL95833BIRTZ（32-qfn (4x4 mm) with exposed thermal pad 封装）的引脚配置。 该功率器件具有栅极、漏极和源极端子。对于无极性封装，请参阅制造商数据手册以了解确切的引脚 1 方向和封装尺寸细节。常见应用包括电源设计、电机驱动和负载开关。
暂无详细引脚数据： ISL95833BIRTZ.
请参阅 数据手册 以查看完整引脚配置。
典型应用
ISL95833BIRTZ 适用于 6 应用s: Ultrabook / Notebook CPU Core Rail, Tablet SoC Power Supply, Integrated Graphics (iGPU) Voltage Rail, 2-in-1 Convertible Laptop Mainboard, Embedded Computing Platform with IMVP-7 SoC, Ultrathin Laptop CPU + PCH Power.
Ultrabook / Notebook CPU Core Rail
The ISL95833BIRTZ is purpose-built for Intel IMVP-7/VR12 compliant notebook CPU core rails, delivering up to 60 A from a 2+1 multiphase topology with 400-600 kHz switching. Its 0.25 V to 1.52 V output range covers the full VID table for Intel U-series and Y-series mobile processors, and the integrated VR1 gate driver plus DrMOS interface minimizes external component count on space-constrained ultrabook mainboards. The R3 modulation scheme reacts to sub-microsecond load steps generated by P-state and C-state transitions, keeping Vcore within the +/-20 mVID tolerance window during dynamic frequency changes.
推荐
Tablet SoC Power Supply
Tablet SoCs that conform to the Intel IMVP-7 specification benefit from the ISL95833BIRTZ's dual-rail control plus integrated VR1 driver, which reduces PCB area compared to discrete two-controller implementations. The exposed-pad 32-QFN (4x4 mm) package fits the thin Z-height envelope of tablet designs while still dissipating the controller's gate-drive losses. SVID compliance lets the SoC command VID codes directly, supporting aggressive power-state transitions needed for always-on tablet use cases such as instant-on from Connected Standby.
推荐
Integrated Graphics (iGPU) Voltage Rail
The ISL95833BIRTZ's VR2 single-phase rail is typically dedicated to the integrated graphics processor voltage domain, providing a separate regulated rail that can be power-gated independently of VR1. This separation is critical when the CPU cores enter deep sleep states but the iGPU remains active for media playback. Per the Renesas datasheet, VR2 accepts the same SVID commands and supports independent voltage margining, enabling automated board-level test without disturbing the VCORE rail.
推荐
2-in-1 Convertible Laptop Mainboard
Convertible laptop mainboards that must operate as both a notebook and a tablet benefit from the ISL95833BIRTZ's IMVP-7 compliance and 2+1 topology in a single 32-QFN. The R3 modulator's fast transient response handles the bursty workloads generated when the user toggles between laptop and tablet modes, and the exposed thermal pad allows direct PCB copper cooling without a dedicated heatsink. Renesas reference designs show typical 4-layer PCB stack-ups with the controller placed near the CPU socket for shortest SVID trace length.
推荐
Embedded Computing Platform with IMVP-7 SoC
Embedded systems built around Intel IMVP-7 compliant SoCs - such as industrial panel PCs, point-of-sale terminals, and ruggedized tablets - use the ISL95833BIRTZ as a single-controller CPU + graphics power solution. The 400 kHz to 600 kHz programmable switching frequency allows the designer to trade efficiency against component size for each industrial thermal envelope. Renesas rates the controller for industrial operating temperatures, making it suitable for factory-floor equipment that requires reliable IMVP-7 power delivery.
推荐
Ultrathin Laptop CPU + PCH Power
Ultrathin laptops that require sub-15 mm Z-height designs benefit from the ISL95833BIRTZ's compact 32-QFN (4x4) footprint plus integrated VR1 gate driver, eliminating a separate driver IC. Per Renesas application notes, the controller's exposed-pad package can be thermally coupled directly to an inner copper plane, removing the need for a top-side heatsink in the thinnest ultrabook chassis. SVID SetPS and SetVID commands allow the embedded controller to put unused rails into deep sleep, extending battery life during standby.
推荐
推荐产品汇总
工程参考数据： ISL95833BIRTZ ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | ISL95833BIRTZ-T | ISL95833IRTZ |
|---|---|---|---|
| Brand | Renesas Electronics | Renesas Electronics | Renesas Electronics |
| Package | 32-QFN (4x4) | 32-QFN (4x4) - same | 32-QFN (4x4) - same |
| Compliance Standard | IMVP-7 / VR12 | IMVP-7 / VR12 | IMVP-7 / VR12 |
| Switching Frequency Range | 400 kHz to 600 kHz | 400 kHz to 600 kHz | 400 kHz to 600 kHz |
| Output Voltage Range | 0.25 V to 1.52 V | 0.25 V to 1.52 V | 0.25 V to 1.52 V |
| Maximum Output Current | 60 A (with DrMOS) | 60 A (with DrMOS) | 60 A (with DrMOS) |
| Silicon Revision | B (production) | B (production) | Original (pre-B) |
| Packaging | Tray | Tape & Reel | Tray |
关键差异点
- Integrated VR1 gate driver reduces BOM and PCB area （对比 ISL95833IRTZ)
- Production-revision silicon for stable supply （对比 ISL95833IRTZ)
- Tray packaging option for low-volume prototyping （对比 ISL95833BIRTZ-T)
设计说明
Use a 4-layer PCB stack-up with a dedicated ground plane directly beneath the ISL95833BIRTZ exposed thermal pad. Per the Renesas reference schematic, place the boot capacitors within 5 mm of their respective UGATE pins and keep the SVID bus traces length-matched and away from switching-node copper to avoid coupling noise into the VID code.
Estimated: with a theta_JA of approximately 33 C/W on a 4-layer JEDEC test board and 0.6 W controller dissipation (VR1 gate drive at 600 kHz), the junction rises roughly 20 C above ambient. In a sealed ultrabook chassis with 60 C ambient, this leaves adequate margin below the 125 C shutdown threshold, but verify with a thermal probe in your specific enclosure.
Do not substitute non-Renesas IMVP-7 controllers (such as ON Semiconductor NCP81239 or TI TPS53631) without re-laying out the PCB - the ISL95833B's pinout is unique and not pin-compatible with those alternatives. Also, confirm DrMOS timing compatibility because the ISL95833B's integrated VR1 driver is tuned for specific Renesas/Intersil DrMOS families; third-party DrMOS with different tri-state PWM thresholds can cause shoot-through.
合规信息
RoHS and REACH compliance per Renesas product page; AEC-Q100 not applicable (consumer/industrial IMVP-7 controller).
