KSZ8863RLLI-TR - 3-Port 10/100 Ethernet Switch w/ PHY | Microchip
料号： KSZ8863RLLI-TR ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $6.85 | $6.85 |
| 10 | $5.95 | $59.50 |
| 100 | $5.1 | $510.00 |
| 500 | $4.4 | $2,200.00 |
| 1,000 | $3.65 | $3,650.00 |
| 3,000 | $3.14 | $9,420.00 |
KSZ8863RLLI-TR 概述
An Ethernet switch IC is a Layer-2 networking semiconductor that interconnects multiple Ethernet ports within a system, performing MAC address learning, frame forwarding, and QoS prioritization. The KSZ8863 belongs to the unmanaged/lightly-managed switch IC family within the broader Ethernet controller category, sitting alongside standalone PHY transceivers and full Layer-2+ managed switches in the network IC taxonomy. Compared to a discrete PHY plus MAC, an integrated switch-on-chip reduces board area, BOM, and power while adding hardware-based QoS.
Key features include three integrated 10/100Base-TX PHYs with HP Auto-MDI/MDI-X, IEEE 802.1Q VLAN tagging support, QoS/priority queues with 802.1p, port-based rate limiting, and per-port cable diagnostics. The RLLI suffix indicates the LQFP-48 industrial-temperature variant (-40C to +85C) supplied in tape-and-reel packaging. The device operates from a single 3.3 V supply with typical power consumption around 0.5 W, and includes a 25 MHz reference clock input.
Internally the KSZ8863 uses a store-and-forward architecture with a 1.5 Mbit shared packet buffer, supports RMII for an external MAC or uplink port, and offers PHY loopback for diagnostics. The integrated PHYs include on-chip termination resistors and adaptive equalization, simplifying magnetics selection.
Typical applications include industrial Ethernet daisy-chaining, IP cameras and surveillance switches, building automation gateways, factory-floor sensor aggregation, automotive Ethernet gateway modules, and any embedded system that needs a small, low-power 3-port switch.
When designing with the KSZ8863RLLI-TR, follow the KSZ8863RLL Hardware Design Checklist for magnetics, RBIAS resistor, and 25 MHz crystal layout. Use short, impedance-controlled 100-ohm differential traces between the PHY outputs and the magnetics, and provide adequate bulk decoupling on each AVDD supply pin.
This page synthesizes distributor pricing, pin-compatible alternatives, and practical design notes that are not found in the manufacturer datasheet alone, helping embedded network designers select and source the right switch IC for their application.
直接替换替代料： KSZ8863RLLI-TR ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： KSZ8863RLLI-TR （相同外形与封装尺寸） ——差异在于 Number of Ports, Package, RoHS Status, External MAC Interface, QoS.
快速对比工具——选择替代料号进行并排对比：
KSZ8863RLLI
✅ 直接替换✓ 有现货
$4.1 / 个
查看数据手册 →KSZ8863MLLI
✅ 直接替换📋 参考替代料（不在目录中）
KSZ8863MLLI-TR
✅ 直接替换📋 参考替代料（不在目录中）
KSZ8863FLL
✅ 直接替换✓ 有现货
联系询价
查看数据手册 →KSZ8863RLL
✅ 直接替换📋 参考替代料（不在目录中）
KSZ8863RLL-TR
✅ 直接替换📋 参考替代料（不在目录中）
KSZ8863RLLI-TR 最大额定值与电气特性
| Product Type | 3-Port 10/100 Managed Ethernet Switch with PHYs |
| Ethernet Standard | IEEE 802.3, IEEE 802.3u (10/100Base-TX) |
| Number of Ports | 3 (integrated PHYs) |
| On-Chip PHYs | 3 x 10/100Base-TX |
| Auto-MDI/MDI-X | Yes (HP Auto-MDI/MDI-X) |
| Host Interface | I2C, SPI |
| External MAC Interface | RMII (one port, configurable) |
| Switch Architecture | Store-and-forward, 1.5 Mbit shared buffer |
| VLAN Support | IEEE 802.1Q VLAN tagging |
| QoS | IEEE 802.1p priority queues |
| Power Management | Energy Efficient Ethernet (EEE), Actiphy, Wake-on-LAN |
| 电源电压 | 3.3 V (single supply) |
| Reference Clock | 25 MHz crystal / external clock |
| 封装 | 48-LQFP (7x7 mm) |
| 工作温度 | -40C to +85C (industrial) |
| 安装类型 | Surface Mount |
| MSL 等级 | MSL3 (per JEDEC J-STD-020) |
| RoHS 状态 | Compliant |
KSZ8863RLLI-TR 引脚配置
| 引脚 1 | VDD33A — 3.3 V analog supply |
| 引脚 2 | XI — 25 MHz crystal input |
| 引脚 3 | XO — 25 MHz crystal output |
| 引脚 4 | RBIAS — External bias resistor |
| 引脚 5 | VDD33D — 3.3 V digital supply |
| 引脚 6 | RESETn — Hardware reset (active low) |
| 引脚 7 | INTn — Interrupt output (active low) |
| 引脚 8 | SDA — I2C data |
| 引脚 9 | SCL — I2C clock |
| 引脚 10 | SCSN — SPI chip select (active low) |
| 引脚 11 | SCLK — SPI clock |
| 引脚 12 | SDO — SPI data out |
| 引脚 13 | SDI — SPI data in |
| 引脚 14 | MDIO — Management data I/O |
| 引脚 15 | MDC — Management data clock |
| 引脚 16 | TXD3/RMII_TXD0 — Port 3 transmit / RMII data |
| 引脚 17 | TXEN3/RMII_TXEN — Port 3 transmit enable / RMII TX enable |
| 引脚 18 | TXD2/REF_CLKI3 — Port 2 transmit / reference clock input |
| 引脚 19 | RXD3/RMII_RXD0 — Port 3 receive / RMII data |
| 引脚 20 | RXDV3/RMII_CRS_DV — Port 3 RX valid / RMII CRS_DV |
| 引脚 21 | RXD2 — Port 2 receive data |
| 引脚 22 | RXDV2 — Port 2 RX valid |
| 引脚 23 | RXC2 — Port 2 receive clock |
| 引脚 24 | TXC2 — Port 2 transmit clock |
| 引脚 25 | TXEN2 — Port 2 transmit enable |
| 引脚 26 | TXD2 — Port 2 transmit data |
| 引脚 27 | TXD1 — Port 1 transmit data |
| 引脚 28 | TXEN1 — Port 1 transmit enable |
| 引脚 29 | TXC1 — Port 1 transmit clock |
| 引脚 30 | RXC1 — Port 1 receive clock |
| 引脚 31 | RXDV1 — Port 1 RX valid |
| 引脚 32 | RXD1 — Port 1 receive data |
| 引脚 33 | TXOP1 — Port 1 PHY TX positive |
| 引脚 34 | TXON1 — Port 1 PHY TX negative |
| 引脚 35 | RXIP1 — Port 1 PHY RX positive |
| 引脚 36 | RXIN1 — Port 1 PHY RX negative |
| 引脚 37 | TXOP2 — Port 2 PHY TX positive |
| 引脚 38 | TXON2 — Port 2 PHY TX negative |
| 引脚 39 | RXIP2 — Port 2 PHY RX positive |
| 引脚 40 | RXIN2 — Port 2 PHY RX negative |
| 引脚 41 | TXOP3 — Port 3 PHY TX positive |
| 引脚 42 | TXON3 — Port 3 PHY TX negative |
| 引脚 43 | RXIP3 — Port 3 PHY RX positive |
| 引脚 44 | RXIN3 — Port 3 PHY RX negative |
| 引脚 45 | AVDD — Analog supply |
| 引脚 46 | AGND — Analog ground |
| 引脚 47 | DVDD — Digital supply |
| 引脚 48 | DGND — Digital ground |
典型应用
KSZ8863RLLI-TR 适用于 6 应用s: Industrial Ethernet Daisy-Chain Switch, IP Camera and Surveillance Switch, Building Automation Gateway, Factory Sensor Aggregation Node, Automotive Ethernet Gateway Module, Embedded System 3-Port Ethernet Switch.
Industrial Ethernet Daisy-Chain Switch
The KSZ8863RLLI-TR fits industrial daisy-chain Ethernet nodes because it integrates three 10/100 PHYs with HP Auto-MDI/MDI-X, store-and-forward switching, and IEEE 802.1Q VLAN tagging in a compact 48-LQFP. Its -40C to +85C industrial temperature rating and EEE/Actiphy power management let it survive factory-floor conditions while cutting idle power. Placed between two daisy-chain ports and one uplink to the controller, it eliminates external PHY ICs, reducing BOM and PCB area for line-powered sensors and edge controllers.
推荐
IP Camera and Surveillance Switch
The KSZ8863RLLI-TR is well suited for multi-sensor IP cameras and surveillance hubs because its three integrated PHYs support two cameras plus an uplink, while the 1.5 Mbit shared buffer absorbs burst traffic from multiple video streams. QoS based on IEEE 802.1p prioritizes control and video channels, and Wake-on-LAN supports remote reboot of the camera. Compared to a discrete PHY+MAC solution, the integrated switch-on-chip shrinks PCB area inside dome-camera enclosures.
推荐
Building Automation Gateway
For building automation gateways, the KSZ8863RLLI-TR provides three Ethernet ports to interconnect HVAC, lighting, and access-control subsystems on a single low-power managed switch. I2C and SPI host interfaces let a small microcontroller or BACnet processor configure VLANs, rate-limit, and QoS without an external Ethernet controller. EEE reduces idle power consumption in always-on gateways, and the 48-LQFP package supports reflow assembly into compact DIN-rail modules.
推荐
Factory Sensor Aggregation Node
In factory sensor aggregation, the KSZ8863RLLI-TR's three PHYs allow a single aggregation node to connect two sensor zones plus a backhaul uplink with hardware-based QoS and rate limiting per port. The integrated store-and-forward architecture provides 1.5 Mbit of buffering, ensuring loss-free forwarding under bursty sensor traffic, and Wake-on-LAN allows remote polling. Operating from a single 3.3 V supply simplifies power-tree design in 24 V industrial systems with onboard regulation.
推荐
Automotive Ethernet Gateway Module
The KSZ8863RLLI-TR serves automotive gateway modules where three Ethernet ports are needed to bridge in-vehicle networks, diagnostic interfaces, and telematics. Its industrial temperature range supports under-hood enclosures, and EEE/Actiphy low-power states reduce quiescent draw on battery-powered telematics units. The integrated PHYs and store-and-forward architecture reduce PCB area, while I2C management allows an automotive MCU to monitor link status and trigger Wake-on-LAN wake events on demand.
推荐
Embedded System 3-Port Ethernet Switch
The KSZ8863RLLI-TR enables compact embedded systems with three Ethernet ports without external PHY ICs. Each integrated PHY includes HP Auto-MDI/MDI-X, eliminating straight-through/crossover cable concerns, while the shared 1.5 Mbit buffer handles mixed traffic bursts. The 25 MHz reference clock input can be shared with an external host MCU, and the small 48-LQFP (7x7 mm) footprint simplifies 4-layer PCB integration with controlled-impedance routing to magnetics.
推荐
推荐产品汇总
工程参考数据： KSZ8863RLLI-TR ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | KSZ8863RLLI | KSZ8863MLLI | KSZ8863MLLI-TR | KSZ8863FLL | KSZ8863RLL |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 48-LQFP (7x7 mm) | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same | 48-LQFP (7x7 mm) - same |
| Number of Ports | 3 (integrated PHYs) | 3 (integrated PHYs) | 3 (integrated PHYs) | 3 (integrated PHYs) | 3 (integrated PHYs) | 3 (integrated PHYs) |
| Host Interface | I2C, SPI, RMII | I2C, SPI, RMII | I2C, SPI, MII | I2C, SPI, MII | I2C, SPI, MII/parallel | I2C, SPI, RMII |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | 0C to +70C |
| Packaging Form | Tape & Reel (TR) | Tray | Tray | Tape & Reel (TR) | Tray | Tray |
| EEE / Actiphy | Yes | Yes | Yes | Yes | Yes | Yes |
| VLAN/QoS | 802.1Q/802.1p | 802.1Q/802.1p | 802.1Q/802.1p | 802.1Q/802.1p | 802.1Q/802.1p | 802.1Q/802.1p |
| Approx Unit Price (qty 1) | $6.85 | ~$6.85 | ~$6.50 | ~$6.50 | ~$6.50 | ~$5.80 |
关键差异点
- Three integrated 10/100 PHYs in a single IC （对比 KSZ8851-16MLL-TR)
- RMII uplink port for external host MAC （对比 KSZ8863MLLI)
- Tape-and-reel packaging for SMT assembly （对比 KSZ8863RLLI (tray))
- Industrial -40C to +85C temperature grade （对比 KSZ8863RLL)
- EEE, Actiphy, and Wake-on-LAN integrated （对比 Discrete PHY plus external switch IC)
设计说明
Follow the KSZ8863RLL Hardware Design Checklist (document 00003048B) for magnetics and RBIAS placement. The RBIAS resistor (typically 12.4 kohm 1%) must connect directly to the RBIAS pin with minimal trace length to set the PHY bias currents. Place a 0.1 uF decoupling cap adjacent to each AVDD/VDD33A pin and a 10 uF bulk cap within 1 cm of the package for clean analog rail performance.
Route the 100-ohm differential TX/RX pairs between the KSZ8863RLLI-TR and the magnetics with controlled impedance, keeping intra-pair skew below 50 mils and length matching the positive and negative traces. Use short, direct ground returns and avoid routing digital signals (host bus, SPI, I2C) under the magnetics or differential pairs to prevent EMI coupling into the analog path.
Power the KSZ8863RLLI-TR from a low-noise 3.3 V LDO rather than directly from a switching converter to avoid degrading PHY signal integrity. Tie all AVDD and VDD33D pins to the same 3.3 V rail with star routing if possible. Hold RESETn low for at least 10 ms after power stable, and let the 25 MHz crystal oscillator stabilize before releasing reset to avoid PHY link-initialization failures.
Select magnetics compliant with IEEE 802.3 and rated for the KSZ8863RLLI-TR's 1:1 turns ratio with center tap on the PHY side. Avoid common-mode chokes unless required by EMI standards. For 100-meter cable compliance, ensure the PCB trace between the PHY and the magnetics is shorter than 50 mm and that the magnetics-to-RJ45 path matches 100-ohm differential impedance.
Common pitfalls when using the KSZ8863RLLI-TR include omitting the RBIAS resistor (PHY will not initialize), incorrect strap-pin pull-ups on host-interface mode select pins (defaults to wrong host bus), and using a noisy switch-mode supply that injects ripple into AVDD causing CRC errors. Verify the host interface mode (I2C/SPI/RMII) at reset by pulling the strap pins to the levels documented in datasheet Table 3-5 before issuing any register writes.
合规信息
RoHS and REACH compliant per Microchip product page. Not AEC-Q100 qualified; for AEC-Q100 automotive Ethernet, designers should evaluate Microchip's LAN969x or LAN8770 families. Halogen-free and lead-free per Microchip packaging materials declaration.
