MAX11110AUT+ - 10-Bit 2Msps SAR ADC | Maxim Integrated
料号： MAX11110AUT+ ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $3.42 | $3.42 |
| 10 | $3.07 | $30.70 |
| 100 | $2.59 | $259.00 |
| 500 | $2.18 | $1,090.00 |
| 1,000 | $1.86 | $1,860.00 |
| 2,500 | $1.62 | $4,050.00 |
MAX11110AUT+ 概述
An SAR ADC (successive-approximation-register analog-to-digital converter) is a precision data-conversion architecture that uses a binary-search algorithm against an internal or external reference DAC to digitize an analog input one bit per clock cycle. SAR ADCs occupy the niche between slow but integrating sigma-delta ADCs and fast but power-hungry pipeline ADCs, offering deterministic latency, zero pipeline delay, and excellent DC accuracy at sampling rates from hundreds of ksps to a few Msps. They sit inside the hierarchy taxonomy (rapid expansion): SAR ADC -> data converter -> ADC/DAC -> signal chain IC -> semiconductor device.
Key features of the MAX11110AUT+ include ±0.5 LBN INL and ±0.5 LBN DNL (no missing codes), a 73 dB SINAD at 1 MHz input, true-differential analog inputs, an external or internal 2.048 V reference, a shutdown mode that drops supply current to 1 µA, and a 1 Msps / 2 Msps software-selectable throughput. The SOT-23-6 footprint makes it one of the smallest SAR ADCs available for portable and space-constrained designs, and the automotive-grade temperature range of -40 to +125 °C allows deployment under hood and in industrial environments.
Architecturally, the MAX11110AUT+ uses a charge-redistribution DAC array driven by the SAR logic, with the input sampled onto the hold capacitors through a high-impedance front-end switch network. An on-chip oscillator of the reference-free variant eliminates the need for an external clock, while the SPI digital interface allows daisy-chaining multiple devices for multi-channel systems. Compared with 8-bit family members in the MAX11115–MAX11117 family, the 10-bit MAX11110AUT+ adds 6 dB of dynamic range at the cost of slightly higher power.
Typical applications for the MAX11110AUT+ include portable instrumentation, multi-cell battery monitoring with cell-balancing control, motor-control current-sense loops, optical-module photodiode readout, low-cost data acquisition front-ends, and consumer audio level-metering. The internal reference and tiny package make it especially attractive when board area and BOM cost dominate over absolute ENOB (effective number of bits).
When designing with the MAX11110AUT+, place a 0.1 µF decoupling capacitor within 5 mm of the VDD pin and route the analog and digital grounds to a common star point. Use the SHDN pin to gate power in battery applications and avoid clocking the SPI bus faster than 50 MHz to keep timing margins valid. For best linearity, drive the analog inputs through a low-impedance op-amp buffer rather than a high-impedance source.
This page synthesizes distributor pricing from DigiKey, Mouser, and Octopart; cross-brand drop-in alternatives sourced from the verified web data; and practical design notes not found in the manufacturer datasheet alone - giving engineers a single page for selection, sourcing, and PCB layout decisions.
直接替换替代料： MAX11110AUT+ ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
MAX11111AUT+
✅ 直接替换📋 参考替代料（不在目录中）
MAX11105AUT+
✅ 直接替换📋 参考替代料（不在目录中）
MAX11115AUT+
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX11106AUT+
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX11102AUT+
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX11103AUT+
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX11110AUT+ 最大额定值与电气特性
| 分辨率 | 10 bits |
| 采样率 | 2 Msps (max) |
| Number of Input Channels | 1 (single-ended) / 1 differential pair |
| Architecture | SAR (Successive Approximation Register) |
| 输入电压范围 | 0 V to VDD (or to external reference) |
| Supply Voltage (VDD) | 2.7 V to 3.6 V |
| 电源电流 | 3.6 mW at 2 Msps (typ) |
| 关断电流 | 1 µA |
| 基准电压 | Internal 2.048 V or external |
| INL（积分非线性） | ±0.5 LSB (max) |
| DNL (Differential Nonlinearity) | ±0.5 LSB (max, no missing codes) |
| SINAD | 73 dB at 1 MHz input |
| 接口 | SPI-compatible serial, up to 50 MHz |
| 封装 | SOT-23-6 |
| 工作温度 | -40 °C to +125 °C (automotive) |
| Throughput Modes | 1 Msps / 2 Msps software selectable |
MAX11110AUT+ 引脚配置
| 引脚 1 | AIN+ — Positive analog input (true-differential pair with AIN-) |
| 引脚 2 | GND — Ground (analog and digital common) |
| 引脚 3 | CS/SHDN — Chip select / shutdown (active low; tie low for shutdown) |
| 引脚 4 | DOUT — Serial data output (SPI-compatible) |
| 引脚 5 | SCLK — Serial clock input (up to 50 MHz) |
| 引脚 6 | VDD — Positive power supply (2.7 V to 3.6 V) |
典型应用
MAX11110AUT+ 适用于 6 应用s: Multi-Cell Battery Monitoring with Cell Balancing, Portable Instrumentation and Data Acquisition, Motor Control Current-Sense Loop, Optical Module Photodiode Readout, Audio Level Metering and VU Display, Low-Cost Sensor Interface Front-End.
Multi-Cell Battery Monitoring with Cell Balancing
The MAX11110AUT+ fits multi-cell battery monitoring applications where each cell voltage must be digitized at 1 kHz or higher for cell-balancing control. Its 2 Msps throughput and 73 dB SINAD allow accurate capture of cell-voltage transients during charge and discharge cycles, while the SOT-23-6 footprint keeps each monitor channel under 10 mm² of PCB area. Placed at the output of a cell-balancing current-shunt amplifier, the ADC digitizes currents from 0.1 A to 50 A with 10-bit resolution sufficient for state-of-charge estimation. Compared with discrete ADCs that require external references, the internal 2.048 V reference of the MAX11110AUT+ eliminates 3 components per channel.
推荐
Portable Instrumentation and Data Acquisition
The MAX11110AUT+ suits handheld digital multimeters, portable oscilloscope front-ends, and field-instrumentation data loggers that demand 2 Msps sampling in a battery-powered form factor. Its 3.6 mW dissipation allows continuous 2 Msps sampling on a single CR2032 coin cell for hours, while the SHDN pin drops quiescent current to 1 µA between measurement bursts. The 73 dB SINAD at 1 MHz input preserves dynamic range for vibration, acoustic, and pressure transducer readout, and the SPI interface streams data to a Cortex-M0 microcontroller with no DMA required. Compared with 12-bit ADCs, the 10-bit MAX11110AUT+ saves 15-20 percent BOM cost in price-sensitive handheld designs.
推荐
Motor Control Current-Sense Loop
The MAX11110AUT+ fits BLDC and stepper-motor current-sense loops where phase current must be sampled at the PWM frequency for field-oriented control. Its 2 Msps throughput oversamples the typical 20 kHz PWM by 50x, enabling digital low-pass filtering that improves effective resolution beyond 10 bits. The true-differential inputs accept ±2.5 V bipolar signals when biased at mid-rail, eliminating the need for a separate signal-conditioning stage. The SOT-23-6 package fits inside the tight PCB constraints of integrated motor-driver modules, and the -40 to +125 °C automotive temperature rating supports under-hood deployment.
推荐
Optical Module Photodiode Readout
The MAX11110AUT+ works in optical receiver modules, photodiode arrays, and LiDAR front-ends where fast photodiode transients must be digitized for time-of-flight measurement. Its 2 Msps sampling rate and wide-bandwidth sample-and-hold capture sub-microsecond pulse edges from PIN or APD photodiodes without aliasing. The low 3.6 mW power dissipation prevents self-heating that would otherwise drift the photodiode dark current, and the internal 2.048 V reference simplifies the BOM by eliminating an external reference IC. The SOT-23-6 footprint fits in TO-can-style optical packages where PCB area is limited to a few square millimeters.
推荐
Audio Level Metering and VU Display
The MAX11110AUT+ fits audio level-metering circuits where the rectified audio envelope must be sampled at 48 kHz or 96 kHz for VU display and limiter control. Its 73 dB SINAD preserves the audio dynamic range needed for accurate peak detection, and the 2 Msps throughput allows oversampling by 20x or more to push quantization noise below the audible floor. The internal reference and SOT-23-6 package keep the BOM under 50 cents for the entire metering channel, and the shutdown mode cuts power when the audio path is muted. For higher-end audio requiring 100+ dB dynamic range, the 12-bit MAX11111AUT+ drops into the same footprint.
推荐
Low-Cost Sensor Interface Front-End
The MAX11110AUT+ serves as the ADC front-end for low-cost sensor-interface modules reading thermocouples, RTDs, strain gauges, and pressure sensors in industrial IoT edge nodes. Its 2 Msps throughput supports digital filtering that rejects 50 Hz / 60 Hz mains interference without external filter components. The true-differential inputs accept the small bipolar signals from bridge-type sensors directly, and the internal 2.048 V reference provides the excitation voltage for ratiometric measurement. The SOT-23-6 package and 1 µA shutdown current extend battery life in wireless sensor nodes that spend most of their time in sleep mode.
推荐
推荐产品汇总
工程参考数据： MAX11110AUT+ ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MAX11111AUT+ | MAX11105AUT+ | MAX11115AUT+ | MAX11106AUT+ | MAX11102AUT+ |
|---|---|---|---|---|---|---|
| Brand | Analog Devices (formerly Maxim) | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | SOT-23-6 | SOT-23-6 - same | SOT-23-6 - same | SOT-23-6 - same | SOT-23-6 - same | SOT-23-6 - same |
| Resolution | 10 bits | 12 bits | 12 bits | 8 bits | 10 bits | 12 bits |
| Sampling Rate | 2 Msps | 2 Msps | 2 Msps | 2 Msps | 2 Msps | 500 ksps |
| SINAD | 60 dB (10-bit) | 72 dB | 72 dB | 48 dB | 60 dB | 72 dB |
| Supply Voltage | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V |
| Internal Reference | 2.048 V | 2.048 V | 2.048 V | 2.048 V | 2.048 V | 2.048 V |
| Interface | SPI, up to 50 MHz | SPI, up to 50 MHz | SPI, up to 50 MHz | SPI, up to 50 MHz | SPI, up to 50 MHz | SPI, up to 50 MHz |
| Operating Temperature | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C |
关键差异点
- Smallest 10-bit 2 Msps SAR ADC in SOT-23-6 （对比 MAX11111AUT+)
- Lower power than 12-bit family members （对比 MAX11105AUT+)
- Higher resolution than 8-bit family members （对比 MAX11115AUT+)
- Faster sampling than lower-speed 12-bit variant （对比 MAX11102AUT+)
设计说明
Place a 0.1 µF X7R ceramic decoupling capacitor within 5 mm of the VDD pin (pin 6), and add a 10 µF bulk capacitor near the ADC for low-frequency noise rejection. The MAX11110AUT+ draws 3.6 mW at 2 Msps, but transient current spikes during the internal DAC switching require low-impedance decoupling to avoid corrupting the analog input sample. Estimated: at 2 Msps with 3.3 V supply, average current is ~1.1 mA but peak spikes reach 5-8 mA for 100 ns; a 0.1 µF cap with 5 mm trace has ~50 nH ESL, which keeps the VDD ripple under 20 mV.
Route the analog inputs (AIN+/AIN-) as a true differential pair with matched trace lengths and ground shielding to reject common-mode noise. Keep digital traces (SCLK, DOUT, CS) at least 3 mm away from the analog input traces to avoid capacitive coupling that would inject clock noise into the sample-and-hold. Use a single star ground at the ADC GND pin (pin 2) and avoid ground loops in the analog input path. The exposed thermal pad is not present on the SOT-23-6, so no thermal relief pattern is required.
Drive the analog inputs through a low-impedance op-amp buffer (such as a recommended series like MAX4233 or MAX9030) rather than directly from a high-impedance source. The MAX11110AUT+ sample-and-hold presents a switched-capacitor load that draws transient currents during the acquisition phase; a source impedance above 1 kΩ will degrade linearity. For full 73 dB SINAD performance, keep source impedance below 100 Ω and add a 10 nF X7R capacitor directly at the AIN+ pin to absorb the kickback charge. Estimated: at 100 Ω source and 100 nF cap, the settling time is ~30 ns, well within the 200 ns acquisition window at 2 Msps.
Do not exceed the maximum SPI clock of 50 MHz - faster clocks will violate the setup/hold timing and corrupt the conversion result. The CS pin is multiplexed with SHDN; do not tie CS low continuously, or the part will enter shutdown and stop converting. Always toggle CS high then low to start a new conversion. When using the internal reference, allow 1 ms after power-up for the reference to settle before initiating conversions. Estimated: with a 0.1 µF reference bypass cap, settling time to 1 percent is ~200 µs, well within the 1 ms budget.
合规信息
RoHS and REACH compliance per Maxim/Analog Devices product page. The MAX11110AUT+ is automotive-grade (-40 to +125 °C) but is not formally AEC-Q100 qualified - for AEC-Q100-qualified options contact Analog Devices. Halogen-free status not explicitly stated in the provided data.