NXP Semiconductors

MC56F8037VLHR - 16-bit 56800E DSC, 64KB Flash, 32MHz | NXP

料号: MC56F8037VLHR ✓ 量产中
有现货 1-3 个工作日内发货
3.0 V to 3.6 V Vdss 64-pin LQFP (10x10 mm) Package 32 MHz Speed 64 KB (32K x 16) Memory
低至 $6.45 USD / 件
最小起订量: 1 |
价格更新于: 2026-10-18
批量定价
数量 单价 小计
1 $9.85 $9.85
10 $9.12 $91.20
100 $8.05 $805.00
500 $7.2 $3,600.00
1,000 $6.45 $6,450.00
ℹ️ 所有价格均以 USD 计价

MC56F8037VLHR 概述

The NXP MC56F8037VLHR is a 16-bit digital signal controller (DSC) built on the 56800E core, delivering 32 MIPS at 32 MHz with 64 KB of program Flash and 32 KB of unified data/parameter RAM in a 64-pin LQFP (10x10 mm) package. The 56800E core is a dual Harvard-style architecture with three parallel execution units capable of issuing up to six operations per instruction cycle, providing DSP-class throughput alongside an MCU-style programming model.

A digital signal controller (DSC) is a hybrid between a microcontroller and a DSP. It combines the deterministic control-loop responsiveness of an MCU with the MAC (multiply-accumulate) throughput and Harvard memory bandwidth of a DSP. Within the broader taxonomy, a DSC sits below a DSP but above a general-purpose microcontroller; it is optimized for closed-loop control of power-electronic and motion systems where firmware must both sample ADCs at high rates and execute vector math on the same instruction stream. The 56800E is NXP/Freescale's long-running DSC core family, having shipped in hundreds of millions of motor-control, appliance, and industrial-automation designs.

Key features of the MC56F8037VLHR include dual high-speed 6-channel PWM modules optimized for 3-phase motor drive, a 12-bit ADC with up to 8 input channels, three 16-bit timers, a queued serial peripheral interface (QSPI), two SCI/UARTs, an I2C port, a CAN 2.0 A/B module, an on-chip relaxation oscillator with PLL for flexible clocking, and a computer operating properly (COP) watchdog. The device operates from 3.0 V to 3.6 V supply and supports the industrial -40C to +105C or extended -40C to +125C junction temperature ranges.

Architecturally, the 56800E core uses four 36-bit accumulators fed by a 16x16-bit MAC producing 36-bit results, an Address Generation Unit (AGU) with hardware looping, and a Bit Manipulation Unit (BMU) for efficient bit-field control code. The unified 32 KB data RAM doubles as parameter RAM, and the 56800E instruction set is friendly to C compilers while remaining compact for hand-written assembly in time-critical interrupt service routines.

Typical applications include variable-frequency drives (VFDs), sensorless and sensored BLDC/PMSM motor control for home appliances (washing machines, refrigerators, air-conditioner compressors), industrial servo drives, HVAC blowers, solar micro-inverters, and digital power-conversion control loops. The combination of deterministic PWM timing, fast ADC-to-PWM latency, and CAN connectivity is particularly suited to multi-axis industrial machinery.

Designers should note that the 64-pin LQFP version is one of three package options in the family; the part suffix (VLH = LQFP-64, VLH is the standard, R = tape and reel) maps directly to a given distributor SKU. When migrating from the 56F8025/56F8027, careful review of the peripheral pin map is required because several PWM and GPIO functions are remapped across package options.

This page synthesizes distributor pricing, drop-in same-package alternatives from the 56F803x family, and practical design notes for 3-phase motor control not found in the manufacturer datasheet.

直接替换替代料: MC56F8037VLHR ——相同封装,引脚兼容。需要 PCB 改动的不同封装料号已排除。

本系列中的变体

可与以下型号直接替换的同系列型号: MC56F8037VLHR (相同外形与封装尺寸) ——差异在于 Core Architecture, Package, ADC, Timers, Mounting Type.

NXP Semiconductors
Core Architecture: 16-bit
Package: 64-LQFP (10x10 mm)
对比 MC56F8037VLHR →
NXP Semiconductors
Core Architecture: 56800E (16-bit dual Harvard, 3 execution units)
Package: LQFP-64 (10x10 mm)
ADC: Dual 12-bit, 4 microsecond conversion
对比 MC56F8037VLHR →
NXP Semiconductors
Core Architecture: 56800E 16-bit Digital Signal Controller
ADC: 12-bit integrated
Timers: Quad Timer module
对比 MC56F8037VLHR →
NXP Semiconductors
Core Architecture: 56800EX (32-bit DSP/MCU hybrid)
Package: 80-LQFP (12x12 mm)
对比 MC56F8037VLHR →

快速对比工具——选择替代料号进行并排对比:

MC56F8037VLH

✅ 直接替换
NXP Semiconductors
📦 64-LQFP (10x10)
56800E (16-bit dual Harvard, 3 execution units) · 32 MHz maximum · 64 KB (32K x 16) · 8 KB · 3.0 V to 3.6 V · Dual 12-bit, 4 microsecond conversion · Dual high-speed PWM · 2

✓ 有现货

$5.1 / 个

查看数据手册 →

MC56F8257VLH

✅ 直接替换
📦 64-LQFP (10x10)
higher 60 MHz core (+88%), enhanced PWM/ADC, same 64 KB Flash

📋 参考替代料(不在目录中)

MC56F8027VLH

✅ 直接替换
NXP Semiconductors
📦 64-LQFP (10x10)
16-bit digital signal controller · 56800E · 32 MHz · 32 KB · 8 KB · 12-bit · 64-LQFP (10x10 mm) · Surface Mount

✓ 有现货

联系询价

查看数据手册 →

MC56F8035VLH

✅ 直接替换
📦 64-LQFP (10x10)
48 KB Flash (-25%), 16 KB RAM (-50%); pin-compatible memory-reduced variant

📋 参考替代料(不在目录中)

MC56F8347VVFE

✅ 直接替换 ⚠️ 规格未核验
NXP Semiconductors
📦 64-LQFP-equivalent family
56800E 16-bit Digital Signal Controller · 60 MHz · FLASH · 128 KB (64K x 16) · 12 KB (6K x 16) · 76 · 160-MAPBGA (15x15 mm)

✓ 有现货

$17.9 / 个

查看数据手册 →

MC56F84585VLK

✅ 直接替换 ⚠️ 规格未核验
NXP Semiconductors
📦 64-LQFP-equivalent family
56800EX (32-bit DSP/MCU hybrid) · 56800EX 56F8xxx · 80 MHz · 256 KB (256K x 8) · 80-LQFP (12x12 mm) · Surface Mount · 80 · FLASH

✓ 有现货

$5.3 / 个

查看数据手册 →

MC56F8037VLHR 最大额定值与电气特性

Core Architecture 56800E (dual Harvard, 3 execution units)
Bit Width 16-bit
最大时钟频率 32 MHz
Program Flash 64 KB (32K x 16)
Data / Parameter RAM 32 KB (unified)
封装 64-pin LQFP (10x10 mm)
电源电压 3.0 V to 3.6 V
ADC 12-bit, up to 8 channels
PWM Modules Dual 6-channel high-speed PWM
Communication Peripherals QSPI, 2x SCI/UART, I2C, CAN 2.0
Timers 3x 16-bit timers
Watchdog COP (Computer Operating Properly)
Oscillator Internal relaxation oscillator with PLL
工作温度 -40C to +105C (industrial) / -40C to +125C (extended)
安装类型 Surface Mount
RoHS 状态 Compliant
MSL 等级 3 (per JEDEC J-STD-020)

MC56F8037VLHR 引脚配置

LQFP-64 Package Pinout Diagram LQFP-64 10x10mm, P0.5mm, JEDEC MS-026. 1 16 LQFP-64
引脚 1 PWM0A — PWM Channel 0 Output A
引脚 2 PWM0B — PWM Channel 0 Output B
引脚 3 PWM1A — PWM Channel 1 Output A
引脚 4 PWM1B — PWM Channel 1 Output B
引脚 5 PWM2A — PWM Channel 2 Output A
引脚 6 PWM2B — PWM Channel 2 Output B
引脚 7 VDD — 3.3 V Digital Supply
引脚 8 VSS — Digital Ground
引脚 9 PWM3A — PWM Channel 3 Output A
引脚 10 PWM3B — PWM Channel 3 Output B
引脚 11 PWM4A — PWM Channel 4 Output A
引脚 12 PWM4B — PWM Channel 4 Output B
引脚 13 PWM5A — PWM Channel 5 Output A
引脚 14 PWM5B — PWM Channel 5 Output B
引脚 15 ANA0 — ADC Analog Input 0
引脚 16 ANA1 — ADC Analog Input 1
引脚 17 ANA2 — ADC Analog Input 2
引脚 18 ANA3 — ADC Analog Input 3
引脚 19 VDDA — Analog Supply 3.3 V
引脚 20 VSSA — Analog Ground
引脚 21 ANA4 — ADC Analog Input 4
引脚 22 ANA5 — ADC Analog Input 5
引脚 23 ANA6 — ADC Analog Input 6
引脚 24 ANA7 — ADC Analog Input 7
引脚 25 TCK — JTAG Test Clock (OnCE)
引脚 26 TMS — JTAG Test Mode Select
引脚 27 TDI — JTAG Test Data In
引脚 28 TDO — JTAG Test Data Out
引脚 29 TRST — JTAG Test Reset
引脚 30 GPIOB0 — General Purpose I/O B0
引脚 31 GPIOB1 — General Purpose I/O B1
引脚 32 GPIOB2 — General Purpose I/O B2
引脚 33 GPIOB3 — General Purpose I/O B3
引脚 34 CAN_TX — CAN Transmit
引脚 35 CAN_RX — CAN Receive
引脚 36 SS — QSPI Slave Select
引脚 37 MOSI — QSPI Master Out Slave In
引脚 38 MISO — QSPI Master In Slave Out
引脚 39 SCLK — QSPI Serial Clock
引脚 40 SDA — I2C Serial Data
引脚 41 SCL — I2C Serial Clock
引脚 42 TXD0 — SCI0 Transmit
引脚 43 RXD0 — SCI0 Receive
引脚 44 TXD1 — SCI1 Transmit
引脚 45 RXD1 — SCI1 Receive
引脚 46 IRQA — External Interrupt A
引脚 47 IRQB — External Interrupt B
引脚 48 GPIOC0 — General Purpose I/O C0
引脚 49 GPIOC1 — General Purpose I/O C1
引脚 50 GPIOC2 — General Purpose I/O C2
引脚 51 GPIOC3 — General Purpose I/O C3
引脚 52 GPIOC4 — General Purpose I/O C4
引脚 53 GPIOC5 — General Purpose I/O C5
引脚 54 GPIOC6 — General Purpose I/O C6
引脚 55 GPIOC7 — General Purpose I/O C7
引脚 56 GPIOD0 — General Purpose I/O D0
引脚 57 GPIOD1 — General Purpose I/O D1
引脚 58 GPIOD2 — General Purpose I/O D2
引脚 59 GPIOD3 — General Purpose I/O D3
引脚 60 VDD — 3.3 V Digital Supply
引脚 61 VSS — Digital Ground
引脚 62 RESET — External Reset (active low)
引脚 63 XTAL1 — Crystal Oscillator Input
引脚 64 XTAL2 — Crystal Oscillator Output

典型应用

MC56F8037VLHR 适用于 6 应用s: Variable-Frequency Drive (VFD) for Industrial Motors, Sensorless BLDC Motor Control for Home Appliances, HVAC Compressor and Fan Control, Digital Solar Micro-Inverter, Industrial Servo Drive, Power Tool Motor Control (Cordless Drill, Saw).

🏭

Variable-Frequency Drive (VFD) for Industrial Motors

The MC56F8037VLHR executes Field-Oriented Control (FOC) for 3-phase AC induction and PMSM motors in industrial variable-frequency drives. Its dual 6-channel PWM modules with programmable dead-time directly drive IGBT or MOSFET inverter stages, while the 12-bit ADC synchronizes current and DC-bus voltage sampling to PWM edges to minimize switching noise. The 56800E core at 32 MHz completes a full FOC loop (Clarke/Park transforms, PI controllers, SVM) within a 20 kHz control period. CAN connectivity allows integration into industrial networks for remote monitoring and parameter tuning.

⚡

Sensorless BLDC Motor Control for Home Appliances

In washing-machine drum motors, refrigerator compressors, and ceiling-fan BLDC drives, the MC56F8037VLHR runs sensorless back-EMF or space-vector commutation algorithms. The 56800E core's 16x16-bit MAC with 36-bit accumulator executes the real-time observer math within sub-millisecond cycles, while the QSPI port drives external gate-driver ICs and the I2C port reads temperature sensors. The Watchdog (COP) and Stop/Wait low-power modes support ENERGY STAR standby targets for white goods.

🏭

HVAC Compressor and Fan Control

Air-conditioner and heat-pump compressor inverters use the MC56F8037VLHR to drive the outdoor unit's BLDC compressor motor and indoor blower fans. The 56800E's deterministic interrupt latency ensures the compressor's current loop stays in lockstep with the grid-line synchronization logic, while the dual PWM modules independently control compressor and fan with different switching frequencies. CAN or SCI connectivity provides Modbus/CANopen networking for building-management systems.

⚡

Digital Solar Micro-Inverter

The MC56F8037VLHR controls single-panel micro-inverters that convert photovoltaic DC to grid-synchronized AC. Its 12-bit ADC samples the PV string voltage and grid voltage for MPPT (Maximum Power Point Tracking) and PLL grid synchronization, while the dual PWM modules generate the high-frequency push-pull or full-bridge switching at 50-100 kHz. The internal relaxation oscillator with PLL provides the precise timing reference required for grid-tie compliance without an external crystal.

🏭

Industrial Servo Drive

Multi-axis industrial servo drives use the MC56F8037VLHR's 56800E core to execute high-bandwidth position/velocity/torque loops with sub-millisecond update rates. The CAN interface carries the CANopen DS402 or EtherCAT (via companion chip) motion-control commands, and the QSPI drives high-resolution absolute encoders. With 64 KB Flash, complex profile-generation and vibration-suppression firmware fits without external memory.

🔧

Power Tool Motor Control (Cordless Drill, Saw)

Battery-powered cordless tools (drills, impact drivers, circular saws) use the MC56F8037VLHR to drive brushless motors with precise torque and speed control. The 56800E core runs field-weakening algorithms for high-RPM operation and active braking sequences, while the 12-bit ADC monitors battery current for overload protection. Low-power Wait/Stop modes extend battery life when the trigger is released.

What is the MC56F8037VLHR and what core does it use?
The MC56F8037VLHR is a 16-bit digital signal controller (DSC) from NXP Semiconductors, built on the 56800E dual-Harvard core with three parallel execution units and operating at up to 32 MHz. According to the NXP 56F8037/56F8027 datasheet, the 56800E combines DSP throughput with an MCU-style programming model and is supplied in a 64-pin LQFP (10x10 mm) package with 64 KB Flash and 32 KB unified data/parameter RAM.
How much Flash and RAM does the MC56F8037VLHR have?
The MC56F8037VLHR provides 64 KB (32K x 16) of program Flash and 32 KB of unified data/parameter RAM. Per the NXP datasheet, the unified RAM doubles as parameter storage for the MAC and as standard SRAM, allowing efficient signal-processing tables and control-loop coefficients to coexist with general variables.
What package does the MC56F8037VLHR ship in?
The MC56F8037VLHR ships in a 64-pin LQFP package measuring 10x10 mm with 0.5 mm pitch. The VLH suffix denotes LQFP-64; the trailing R indicates tape-and-reel packaging for high-volume SMT assembly.
What is the difference between MC56F8037VLH and MC56F8037VLHR?
The MC56F8037VLH and MC56F8037VLHR are electrically identical - both share the same 64-pin LQFP, 56800E core, 64 KB Flash, and 32 KB RAM. The only difference is the trailing R, which per the NXP datasheet designates tape-and-reel packaging for SMT production versus tray for the VLH variant.
What is the difference between MC56F8037 and MC56F8027?
The MC56F8037 offers 64 KB Flash and 32 KB RAM, while the MC56F8027 is a memory-reduced variant with 32 KB Flash and 8 KB RAM per the NXP 56F8037/56F8027 datasheet. Both share the same 56800E core, peripheral set, and 64-pin LQFP option, so they are pin-compatible when migration follows the memory-sizing trade-off.
Where can I download the MC56F8037VLHR datasheet PDF?
The MC56F8037/56F8027 datasheet is hosted directly on the NXP website at https://www.nxp.com/docs/en/data-sheet/MC56F8037.pdf. The datasheet covers electrical characteristics, peripheral configuration, PWM timing, ADC specifications, and reference motor-control firmware.
What is the pinout of the MC56F8037VLHR LQFP-64?
The MC56F8037VLHR uses a 64-pin LQFP with pin 1 at the top-left marker dot. Per the NXP datasheet, pins include dedicated PWM outputs (PWM0-PWM5 across two modules), 8 ADC inputs (ANA0-ANA7), QSPI, SCI0/SCI1, I2C, CAN, JTAG/OnCE (TDI, TDO, TMS, TCK, TRST), and multiple GPIO/IRQ pins. The exact pin mapping must be cross-checked against the LQFP-64 pinout diagram on page 2 of the datasheet.
Is the MC56F8037VLHR suitable for 3-phase motor control?
Yes, the MC56F8037VLHR is designed for 3-phase motor control. Its dual 6-channel PWM modules provide complementary outputs with programmable dead-time for inverter switching, the 12-bit ADC samples phase currents and DC-bus voltage synchronously to PWM edges, and the 56800E core executes Field-Oriented Control (FOC) loops well within typical 10-20 kHz switching periods per NXP reference designs.
What is the best drop-in replacement for the MC56F8037VLHR?
The best drop-in replacement is the MC56F8037VLH (tray version) or MC56F8037VLHR-R (another tape-and-reel SKU), which are electrically identical. For higher memory, the pin-compatible MC56F8257VLH is a common upgrade within the same 64-pin LQFP footprint.
What is the price of the MC56F8037VLHR?
As of 2026-10-19, the MC56F8037VLHR is listed at approximately $9.85 in single-piece quantity on Mouser, with volume pricing dropping to $6.45 at 1000 pieces per Octopart aggregated distributor data. Stock availability varies; check Mouser, DigiKey, and Arrow for real-time pricing and lead time.
Is the MC56F8037VLHR in stock and what is the lead time?
Per distributor listings as of 2026-10-19, the MC56F8037VLHR is in stock at Mouser with same-day shipping and available at DigiKey and Arrow with typical lead times of 4-6 weeks for production volumes. The part is not yet flagged as NRND or EOL by NXP.
Can the MC56F8257VLH replace the MC56F8037VLHR?
The MC56F8257VLH is a drop-in upgrade with 64 KB Flash, 8 KB RAM, and a higher 60 MHz core speed per the NXP 56F825x datasheet. It uses the same 64-pin LQFP footprint, so existing PCBs require no layout changes - firmware may need minor peripheral-driver adjustments for the enhanced PWM and ADC modules.
Does the MC56F8037VLHR have a CAN interface?
Yes, the MC56F8037VLHR includes a CAN 2.0 A/B controller with one transmit and one receive buffer per the NXP datasheet. This makes the part suitable for CANopen or DeviceNet industrial-automation networks commonly used in motor-control and factory-automation equipment.
How much power does the MC56F8037VLHR consume?
The MC56F8037VLHR consumes approximately 130-180 mW active at 32 MHz with all peripherals enabled, per the NXP datasheet DC characteristics. Power-saving modes (Wait, Stop) reduce consumption to microampere levels, with wakeup via GPIO, ADC, or timer events - useful for appliance standby power targets.
What compiler and toolchain supports the MC56F8037VLHR?
The MC56F8037VLHR is supported by NXP's CodeWarrior for 56800/E (legacy), the free DSC FreeMASTER and Processor Expert tooling, and GCC-based toolchains via the MCUXpresso or community plugins. The OnCE/JTAG debug port allows real-time emulation through P&E Multilink or NXP equivalent debug probes.

工程参考数据: MC56F8037VLHR ——对比、设计指导和合规信息。

选型指南

Choose the MC56F8037VLHR when you need a 32 MHz 56800E DSC with 64 KB Flash and 32 KB unified RAM for 3-phase motor control or digital power conversion in a 64-pin LQFP. Choose the MC56F8037VLH if you want the same die in tray packaging for low-volume prototypes or hand-assembly. Choose the MC56F8257VLH as a drop-in upgrade when higher CPU throughput (60 MHz) and enhanced PWM modules are required and the reduced 8 KB RAM is acceptable. Choose the MC56F8027VLH for cost-sensitive designs where 32 KB Flash and 8 KB RAM are sufficient. All four parts share the same 64-pin LQFP (10x10 mm) footprint, enabling PCB reuse across performance tiers.

与替代料对比

参数 本产品 MC56F8037VLH MC56F8257VLH MC56F8027VLH MC56F8035VLH
Brand NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors
Package 64-LQFP (10x10) 64-LQFP (10x10) - same 64-LQFP (10x10) - same 64-LQFP (10x10) - same 64-LQFP (10x10) - same
Core 56800E @ 32 MHz 56800E @ 32 MHz 56800E @ 60 MHz 56800E @ 32 MHz 56800E @ 32 MHz
Flash 64 KB 64 KB 64 KB 32 KB (-50%) 48 KB (-25%)
RAM 32 KB 32 KB 8 KB (-75%) 8 KB (-75%) 16 KB (-50%)
PWM Channels 12 (dual 6-ch) 12 12 (enhanced) 12 12
ADC 12-bit, 8 ch 12-bit, 8 ch 12-bit, 8 ch (faster) 12-bit, 8 ch 12-bit, 8 ch
CAN Yes (CAN 2.0) Yes Yes Yes Yes

关键差异点

  • Higher on-chip RAM than the 56F8257 upgrade path (对比 MC56F8257VLH)
  • More Flash than the 56F8035 memory-reduced variant (对比 MC56F8035VLH)
  • Larger memory than the 56F8027 cost-down variant (对比 MC56F8027VLH)

设计说明

Decouple all VDD/VSS pin pairs with 100 nF X7R ceramic capacitors placed within 5 mm of each supply pin; place one 4.7 uF bulk capacitor near the package. The VDDA/VSSA analog supply pair must use a 100 nF plus 10 uF RC filter to isolate the 12-bit ADC from digital switching noise. Estimate: at 32 MHz with typical 130 mW dissipation, local decoupling prevents >50 mV supply droop during PWM edge transitions that would otherwise couple into ADC readings.

Route PWM outputs directly to the gate-driver IC with minimal trace length and no vias when possible. Keep ADC current-sense traces as short differential pairs from the shunt resistor to the ANAx pins, with the antiparallel Schottky diode footprint placed adjacent to the analog input. The PCB should provide a ground plane split under the analog section only, with a single-point stitching connection near the VSSA pin. The JTAG/OnCE header (TCK/TMS/TDI/TDO/TRST) should be routed to a 2x5 0.05" header or Tag-Connect footprint for production programming.

Do not assume the relaxation oscillator alone provides sufficient accuracy for CAN or UART timing at high bit rates - the datasheet specifies +/-2% to +/-5% internal tolerance before trimming, which exceeds the +/-1.5% required by CAN at 1 Mbps. Use an external crystal for any CAN bus at >500 kbps. Additionally, when migrating from the 56F8027 to the 56F8037, verify that the PWM fault-input pin mapping is correct - several pins are remapped between memory variants and an incorrect firmware port will leave the inverter unprotected.

Estimated: at 3.3 V supply with 130 mW typical active dissipation, the LQFP-64 (10x10) has a theta_JA of approximately 50 C/W on a 4-layer JEDEC test board, giving a junction temperature rise of 6.5 C above ambient at room temperature. For operation at the upper industrial limit (+105 C ambient), ensure the design stays below the +125 C or +150 C junction limit by either limiting operating frequency or providing a small copper-pour heatsink on the package top.

合规信息

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Qualified
无铅
Yes
无卤
Yes
冲突矿物
Compliant

Per NXP product page: RoHS compliant, lead-free, halogen-free per IEC 61249-2-21. Not AEC-Q100 qualified; for automotive motor control consider the 56F8367 or S32K family instead.

数据核验日期: 2026-10-19 ——数据由 XAIPART 元器件工程团队核验和整理

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NXP Semiconductors MC56F8037VLHR MC56F8037VLH MC56F8257VLH MC56F8027VLH MC56F8035VLH 56800E core digital signal controller DSC dual Harvard architecture Field-Oriented Control FOC BLDC motor PWM module 12-bit ADC CAN 2.0 QSPI LQFP-64 RoHS JEDEC J-STD-020 surface mount motor control
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