PIC24FJ192GB110-I/PT - 16-Bit MCU 192KB Flash USB OTG | Microchip
料号： PIC24FJ192GB110-I/PT ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $8.32 | $8.32 |
| 10 | $7.49 | $74.90 |
| 100 | $6.62 | $662.00 |
| 500 | $5.84 | $2,920.00 |
| 1,000 | $5.21 | $5,210.00 |
PIC24FJ192GB110-I/PT 概述
A 16-bit microcontroller is a microprocessor core with a 16-bit data path, 16-bit registers, and a 16-bit ALU, providing a higher performance ceiling than 8-bit cores while remaining significantly simpler and lower-power than 32-bit Cortex-M devices. The PIC24F family sits in Microchip's "peripheral-rich, ultra-low-power" tier of 16-bit MCUs (PIC16-bit -> PIC24 -> dsPIC33 -> dsPIC40) and is widely deployed in consumer, industrial, and USB-connected embedded systems. The PIC24FJ192GB110 variant adds a USB 2.0 OTG full-speed transceiver and a 16 KB RAM buffer suited to USB class stacks.
Key features include 192 KB Flash (65.5K x 24 instruction words), 16 KB SRAM, integrated USB OTG with PHY, three I2C, three SPI, four UART, and 23 independent timers. Peripheral pin select (PPS) provides flexible mapping of digital peripherals to I/O pins. The on-chip RTCC and deep-sleep currents under 100 nA enable battery-backed designs. The 100-pin TQFP package exposes up to 84 general-purpose I/O pins.
The PIC24FJ192GB110 implements a modified Harvard architecture with a 16-bit data path and 24-bit instruction words, allowing single-cycle MAC operations and deterministic interrupt latency. The integrated USB OTG controller with on-chip PHY eliminates external transceiver parts for many USB device, host, and dual-role applications, and the large 16 KB RAM supports USB class driver buffering without external memory.
Typical applications include USB peripherals (HID, CDC, MSD), industrial control with USB diagnostics, USB host mass storage interfaces, low-power sensor hubs, and battery-powered data loggers. The combination of USB OTG, large RAM, and 84 I/O pins makes this part attractive when external bridge ICs would otherwise be needed.
When designing with this device, ensure the 2.0-3.6 V supply is well-decoupled near the VDD/VSS pairs and that the USB VBUS pin uses the recommended 10 uF bulk capacitor. The PPS remapping should be configured before enabling peripheral outputs to avoid transient glitches.
This page synthesizes distributor pricing, USB OTG-aware drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, supporting faster component selection and BOM risk reduction.
直接替换替代料： PIC24FJ192GB110-I/PT ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： PIC24FJ192GB110-I/PT （相同外形与封装尺寸） ——差异在于 Package, Timers, Operating Temperature, Standby Current, Core.
快速对比工具——选择替代料号进行并排对比：
PIC24FJ128GB110-I/PT
✅ 直接替换✓ 有现货
$3.78 / 个
查看数据手册 →PIC24FJ256GB110-I/PT
✅ 直接替换✓ 有现货
$5.62 / 个
查看数据手册 →PIC24FJ192GA110-I/PT
✅ 直接替换✓ 有现货
$4.78 / 个
查看数据手册 →PIC24FJ192GB108-I/PT
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$4.88 / 个
查看数据手册 →PIC24FJ128GB110-I/PF
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$4.05 / 个
查看数据手册 →PIC24FJ192GB110-I/PT 最大额定值与电气特性
| Core | PIC 16-bit (PIC24F) |
| CPU Architecture | Modified Harvard, 16-bit data path, 24-bit instructions |
| Maximum CPU Speed | 32 MHz (16 MIPS) |
| Program Flash | 192 KB (65.5K x 24 words) |
| RAM | 16 KB |
| USB Interface | USB 2.0 Full-Speed OTG with on-chip PHY |
| Operating Voltage | 2.0 V to 3.6 V |
| I2C | 3 modules |
| SPI | 3 modules |
| UART | 4 modules |
| Timers | 23 independent timers |
| I/O Pins | 84 |
| 工作温度 | -40C to +85C (Industrial) |
| 封装 | 100-pin TQFP (12x12 mm) |
| 安装类型 | Surface Mount |
| MSL 等级 | 3 (168 hours) |
| Lead-Free / RoHS | Compliant |
| Standby Current | <100 nA (deep sleep, per datasheet) |
PIC24FJ192GB110-I/PT 引脚配置
| 引脚 1 | RG15 — Port RG bit 15 (I/O) |
| 引脚 2 | VSS — Ground reference |
| 引脚 3 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 4 | RP5/RB5 — Remappable I/O / Port B bit 5 |
| 引脚 5 | RP4/RB4 — Remappable I/O / Port B bit 4 |
| 引脚 6 | RP3/RB3 — Remappable I/O / Port B bit 3 |
| 引脚 7 | RP2/RB2 — Remappable I/O / Port B bit 2 |
| 引脚 8 | RP1/RB1 — Remappable I/O / Port B bit 1 |
| 引脚 9 | RP0/RB0 — Remappable I/O / Port B bit 0 |
| 引脚 10 | RP13/RB13 — Remappable I/O / Port B bit 13 |
| 引脚 11 | RP14/RB14 — Remappable I/O / Port B bit 14 |
| 引脚 12 | RP15/RB15 — Remappable I/O / Port B bit 15 |
| 引脚 13 | VSS — Ground reference |
| 引脚 14 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 15 | OSC1/CLKI — Crystal oscillator input / external clock |
| 引脚 16 | OSC2/CLKO — Crystal oscillator output |
| 引脚 17 | MCLR — Master clear (reset) input |
| 引脚 18 | PGED2/AN0 — Programming data / analog input 0 |
| 引脚 19 | PGEC2/AN1 — Programming clock / analog input 1 |
| 引脚 20 | AN2 — Analog input 2 |
| 引脚 21 | AN3 — Analog input 3 |
| 引脚 22 | AN4 — Analog input 4 |
| 引脚 23 | AN5 — Analog input 5 |
| 引脚 24 | VSS — Ground reference |
| 引脚 25 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 26 | AN6 — Analog input 6 |
| 引脚 27 | AN7 — Analog input 7 |
| 引脚 28 | AN8 — Analog input 8 |
| 引脚 29 | AN9 — Analog input 9 |
| 引脚 30 | AN10 — Analog input 10 |
| 引脚 31 | AN11 — Analog input 11 |
| 引脚 32 | AN12 — Analog input 12 |
| 引脚 33 | AN13 — Analog input 13 |
| 引脚 34 | AN14 — Analog input 14 |
| 引脚 35 | AN15 — Analog input 15 |
| 引脚 36 | VSS — Ground reference |
| 引脚 37 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 38 | D+ — USB D+ data line |
| 引脚 39 | D- — USB D- data line |
| 引脚 40 | VBUS — USB VBUS sense (USB OTG) |
| 引脚 41 | VUSB3V3 — USB transceiver 3.3 V supply |
| 引脚 42 | RP6/RB6 — Remappable I/O / Port B bit 6 |
| 引脚 43 | RP7/RB7 — Remappable I/O / Port B bit 7 |
| 引脚 44 | RP8/RB8 — Remappable I/O / Port B bit 8 |
| 引脚 45 | RP9/RB9 — Remappable I/O / Port B bit 9 |
| 引脚 46 | VSS — Ground reference |
| 引脚 47 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 48 | RC1 — Port C bit 1 |
| 引脚 49 | RC2 — Port C bit 2 |
| 引脚 50 | RC3 — Port C bit 3 |
| 引脚 51 | RC4 — Port C bit 4 |
| 引脚 52 | TDI — JTAG test data in |
| 引脚 53 | TCK — JTAG test clock |
| 引脚 54 | TMS — JTAG test mode select |
| 引脚 55 | TDO — JTAG test data out |
| 引脚 56 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 57 | VSS — Ground reference |
| 引脚 58 | RD0 — Port D bit 0 |
| 引脚 59 | RD1 — Port D bit 1 |
| 引脚 60 | RD2 — Port D bit 2 |
| 引脚 61 | RD3 — Port D bit 3 |
| 引脚 62 | RD4 — Port D bit 4 |
| 引脚 63 | RD5 — Port D bit 5 |
| 引脚 64 | RD6 — Port D bit 6 |
| 引脚 65 | RD7 — Port D bit 7 |
| 引脚 66 | VSS — Ground reference |
| 引脚 67 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 68 | RD8 — Port D bit 8 |
| 引脚 69 | RD9 — Port D bit 9 |
| 引脚 70 | RD10 — Port D bit 10 |
| 引脚 71 | RD11 — Port D bit 11 |
| 引脚 72 | RD12 — Port D bit 12 |
| 引脚 73 | RD13 — Port D bit 13 |
| 引脚 74 | RD14 — Port D bit 14 |
| 引脚 75 | RD15 — Port D bit 15 |
| 引脚 76 | VSS — Ground reference |
| 引脚 77 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 78 | RE0 — Port E bit 0 |
| 引脚 79 | RE1 — Port E bit 1 |
| 引脚 80 | RE2 — Port E bit 2 |
| 引脚 81 | RE3 — Port E bit 3 |
| 引脚 82 | RE4 — Port E bit 4 |
| 引脚 83 | RE5 — Port E bit 5 |
| 引脚 84 | RE6 — Port E bit 6 |
| 引脚 85 | RE7 — Port E bit 7 |
| 引脚 86 | RF0 — Port F bit 0 |
| 引脚 87 | RF1 — Port F bit 1 |
| 引脚 88 | VSS — Ground reference |
| 引脚 89 | VDD — Positive supply (2.0 V to 3.6 V) |
| 引脚 90 | RF2 — Port F bit 2 |
| 引脚 91 | RF3 — Port F bit 3 |
| 引脚 92 | RF4 — Port F bit 4 |
| 引脚 93 | RF5 — Port F bit 5 |
| 引脚 94 | RF6 — Port F bit 6 |
| 引脚 95 | RF7 — Port F bit 7 |
| 引脚 96 | RG0 — Port G bit 0 |
| 引脚 97 | RG1 — Port G bit 1 |
| 引脚 98 | RG2 — Port G bit 2 |
| 引脚 99 | RG3 — Port G bit 3 |
| 引脚 100 | RG4 — Port G bit 4 |
典型应用
PIC24FJ192GB110-I/PT 适用于 6 应用s: USB Human Interface Device (HID) Peripherals, USB CDC Virtual COM Port Bridges, USB Mass Storage Device (MSD) Data Loggers, USB Host with Mass Storage Interface, Low-Power Sensor Hubs with USB Diagnostics, Industrial Control with USB Field Updates.
USB Human Interface Device (HID) Peripherals
The PIC24FJ192GB110-I/PT is well suited for USB HID peripherals such as keyboards, mice, game controllers, and custom input devices. The integrated USB 2.0 full-speed OTG PHY with on-chip transceiver eliminates external bridge ICs, reducing BOM cost and PCB area. The 16 KB RAM is large enough to host the USB HID class stack plus application runtime memory for key debouncing, macro handling, and LED animation without external SRAM. The PIC24F core at 32 MHz / 16 MIPS provides headroom for HID report processing, NKRO logic, and wireless dongle interfaces, while the four UARTs can drive external BLE or 2.4 GHz modules. Deep-sleep current under 100 nA supports battery-powered wireless HID designs that wake on interrupt.
推荐
USB CDC Virtual COM Port Bridges
Industrial and embedded designs often need a USB-to-UART bridge; PIC24FJ192GB110-I/PT handles CDC class natively over its USB OTG peripheral and exposes four hardware UARTs to downstream MCUs or sensors. The 192 KB Flash and 16 KB RAM allow a full CDC stack plus command parser and trace logging on-chip. Operating voltage 2.0-3.6 V supports both battery-powered and 3.3 V industrial rails, and the -40C to +85C industrial temperature range ensures operation in factory and outdoor enclosures. Compared with discrete bridge chips such as FT232R, this approach adds a programmable MCU with GPIOs and timers at similar cost, enabling custom vendor protocols on the UART side.
推荐
USB Mass Storage Device (MSD) Data Loggers
The PIC24FJ192GB110-I/PT supports USB MSD class to expose SD cards or onboard Flash as removable storage for portable data loggers and instrumentation recorders. With 16 KB RAM, the MCU can buffer sector writes, manage FAT file allocation tables, and timestamp samples with the on-chip RTCC. The 23 independent timers handle multiple sample-rate channels simultaneously, while the deep-sleep current under 100 nA keeps quiescent drain low between log events. The integrated USB OTG PHY lets the same port serve as both host (reading external USB sticks) and device (PC downloading logs), and the 100-pin TQFP exposes enough I/O for SPI-driven SD cards, ADC inputs, and status displays.
推荐
USB Host with Mass Storage Interface
Acting as a USB host, PIC24FJ192GB110-I/PT can interface to USB flash drives, keyboards, and printers in embedded kiosks, industrial terminals, and test equipment. The integrated OTG PHY plus host-capable controller eliminates external hub ICs in many single-port designs. The 192 KB Flash accommodates USB host class drivers (HID, Mass Storage) and application logic for ticket printing, kiosk I/O, or test sequencing. The 84 I/O pins handle LCDs, keypads, sensors, and motor controls around the host interface, and the four UARTs provide debug and external device connectivity without sacrificing host operation.
推荐
Low-Power Sensor Hubs with USB Diagnostics
Battery-powered sensor hubs benefit from the PIC24FJ192GB110-I/PT deep-sleep current under 100 nA combined with on-chip RTCC, multiple I2C/SPI peripherals, and a USB port for diagnostics and firmware updates. The 16 KB RAM buffers sensor frames between wake cycles, while the 192 KB Flash supports sensor fusion, USB CDC diagnostic logs, and a USB DFU bootloader for field updates. The 23 timers handle multiple sensor sample rates from sub-Hz temperature to kHz-class vibration channels, and the 100-pin TQFP package supports up to 84 I/O for sensor matrix and external ADC interfaces.
推荐
Industrial Control with USB Field Updates
The PIC24FJ192GB110-I/PT fits industrial control nodes that need USB for firmware updates, configuration export, and diagnostics without an external bridge IC. With 23 timers and 4 UARTs, the MCU can drive PWM outputs, quadrature decoders, and Modbus RTU links while presenting a USB CDC/MSD port to a service laptop. The -40C to +85C industrial temperature range covers factory floor enclosures, and the 100-pin TQFP exposes 84 I/O for opto-isolated inputs, relay drivers, and analog sensors. The 192 KB Flash supports a dual-image bootloader (active + upgrade) for safe USB-based field updates.
推荐
推荐产品汇总
工程参考数据： PIC24FJ192GB110-I/PT ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | PIC24FJ128GB110-I/PT | PIC24FJ256GB110-I/PT | PIC24FJ192GA110-I/PT | PIC24FJ192GB108-I/PT | PIC24FJ128GB110-I/PF |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 100-pin TQFP (12x12 mm) | 100-pin TQFP (12x12 mm) | 100-pin TQFP (12x12 mm) | 100-pin TQFP (12x12 mm) | 100-pin TQFP (12x12 mm) | 100-pin TQFP (PF, lead-free) |
| Flash Memory | 192 KB | 128 KB | 256 KB | 192 KB | 192 KB | 128 KB |
| RAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| USB OTG PHY | Yes (integrated) | Yes (integrated) | Yes (integrated) | No | Yes (integrated) | Yes (integrated) |
| Maximum CPU Speed | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) | 32 MHz (16 MIPS) |
| Operating Voltage | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V | 2.0 V to 3.6 V |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Lead Time (as of 2026-09-29) | ~9 weeks | Similar (~9 weeks) | Similar (~9 weeks) | Similar (~9 weeks) | Similar (~9 weeks) | Similar (~9 weeks) |
关键差异点
- Integrated USB OTG PHY with full-speed transceiver （对比 PIC24FJ192GA110-I/PT)
- Higher Flash density in same footprint （对比 PIC24FJ128GB110-I/PT)
- 84 I/O pins for maximum peripheral access （对比 PIC24FJ192GB108-I/PT)
设计说明
Decouple every VDD/VSS pair with 100 nF ceramic placed within 3 mm of each pair, plus a single 4.7 uF bulk on the main VDD rail. The USB VUSB3V3 pin (pin 41) requires its own 10 uF bulk and a 100 nF decoupling cap per the Microchip datasheet. Avoid routing digital return currents through the analog AVSS/AVDD pair to keep ADC noise low. Estimated: total decoupling budget is ~7 small-value ceramic caps plus 1-2 bulk caps.
The 100-pin TQFP has a theta_JA in the 50-60 C/W range on a standard 2-layer JEDEC board, rising to ~70 C/W on low-copper designs. The PIC24FJ192GB110 draws low current in deep sleep (under 100 nA) and modest active current at 32 MHz, so thermal rise is rarely a problem in USB applications. However, ensure the PCB has at least 1 oz copper on VDD/VSS planes to spread heat from higher duty-cycle use cases.
Route USB D+ and D- as a 90-ohm differential pair with trace lengths matched within 150 mil per the USB 2.0 full-speed spec. Keep the pair away from switching signals and clock traces to maintain signal integrity. Place the USB connector within 25 mm of the D+/D- pins to minimize stub length and EMI, and route the VBUS sense line with the same care as a signal trace.
Do not omit the VUSB3V3 bulk capacitor; USB enumeration fails without proper USB transceiver supply. Configure Peripheral Pin Select (PPS) registers before enabling peripheral outputs to avoid transient glitches on shared pins. Always include the MCLR pull-up and decoupling per the Microchip datasheet to guarantee proper reset behavior in noisy environments.
合规信息
RoHS compliant and lead-free per Microchip product page. Not AEC-Q100 qualified (industrial grade only).
