WM8782SEDS/V - 24-Bit 192kHz Stereo ADC | Cirrus Logic
料号： WM8782SEDS/V ✗ 停产WM8782SEDS/V 概述
An audio ADC is a semiconductor that converts left and right analog audio voltages into digital words for processing, storage, transmission, or playback. The WM8782 belongs to the broader hierarchy of audio converter, data-converter, analog-to-digital converter, and integrated-circuit families. Its stereo architecture captures two channels simultaneously, while its digital output can feed an audio processor, codec, digital mixer, or digital recording system.
The WM8782SEDS/V provides 24-bit resolution and sampling rates from 8kHz to 192kHz. Its sigma-delta ADC architecture supports 32x, 64x, or 128x oversampling, while the output word length can be configured from 16 to 24 bits. FORMAT and IWL control inputs permit operation in standard audio-interface configurations, reducing the need for external logic or a separate digital interface controller.
Master and slave clocking schemes are controlled through the M/S input, allowing the converter to work with external master clocks or generate its own audio clock in master mode. The integrated front-end op-amp accepts analog input signals greater than the nominal line-level range, while the two-channel input structure supports stereo source capture. These features make the converter suitable for compact digital audio equipment that requires high-rate conversion without a large external analog front end.
Typical uses include consumer recording equipment, digital mixers, multichannel sound-card inputs, media-capture systems, and industrial audio interfaces. The device is also appropriate for projects requiring 192kHz acquisition when the host processor can accommodate the corresponding data rate. Its 20-pin SSOP package supports conventional surface-mount assembly, although careful grounding and decoupling remain essential for audio performance.
During layout, place input, output, and decoupling components according to the pin-description table and recommended application circuit in the manufacturer datasheet. The analog input and digital interface paths require a quiet ground strategy, short return paths, and controlled clock routing. Because this converter performs high-resolution signal acquisition, bypassing, grounding, and supply sequencing can influence channel matching and overall signal integrity.
This product page combines the device identity, verified technical attributes, lifecycle information, source links, replacement analysis, and practical design guidance. It helps engineers distinguish exact package compatibility from merely similar ADC functions and plan PCB, interface, and sourcing decisions before committing the WM8782SEDS/V to a design.
直接替换替代料： WM8782SEDS/V ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
WM8782SEDS
✅ 直接替换📋 参考替代料（不在目录中）
WM8782SEDS/V 最大额定值与电气特性
| Product Type | Stereo audio analog-to-digital converter |
| 分辨率 | 24 bit |
| Maximum Sampling Rate | 192kHz |
| Minimum Sampling Rate | 8kHz |
| Number of Analog Input Channels | 2 channels |
| Digital Audio Interface | I2S |
| Output Word Length | 16 bit to 24 bit |
| ADC Oversampling Ratios | 32x, 64x, or 128x |
| Supply Voltage Range | 2.7V to 3.6V or 4.5V to 5.5V |
| 工作温度范围 | -40C to +85C |
| 封装 | 20-pin SSOP |
| 安装类型 | Surface Mount |
| Integrated Front-End Op-Amp | Yes |
| Clocking Modes | Master or Slave |
| Control Inputs | FORMAT, IWL, and M/S |
| Digital Filters | Sigma-delta digital filtering |
WM8782SEDS/V 20-pin ssop 引脚配置指南
WM8782SEDS/V（20-pin ssop 封装）的引脚配置。 该模拟元件具有输入、输出和电源引脚。请参阅制造商数据手册以了解失调调零、补偿和使能引脚配置。适用于信号调理和放大器电路。
暂无详细引脚数据： WM8782SEDS/V.
请参阅 数据手册 以查看完整引脚配置。
典型应用
WM8782SEDS/V 适用于 6 应用s: Stereo Digital Recording, Digital Sound-Card Input, Digital Audio Mixer, Industrial Audio Acquisition, Audio Measurement Instrument, Media-Capture and Monitoring System.
Stereo Digital Recording
The WM8782SEDS/V fits stereo recording systems that need simultaneous left and right conversion, 24-bit output words, and sample rates extending to 192kHz. Its two-channel sigma-delta front end connects to line-level sources, while the integrated op-amp accommodates suitable input amplitudes. In a recording chain, the I2S output can feed a digital audio processor or storage engine, provided the host supplies or accepts the selected clocking arrangement. The main design consideration is matching the 192kHz-capable converter to a host path that can handle the corresponding data rate without introducing avoidable clock or data-line noise.
推荐
Digital Sound-Card Input
The WM8782SEDS/V is suitable for a stereo sound-card input stage requiring 24-bit conversion and I2S output up to 192kHz. Two analog channels preserve left and right capture paths, and the selectable 32x, 64x, or 128x oversampling provides flexibility for different operating rates. Its SSOP-20 package is useful for compatible legacy boards, but the footprint requires careful central thermal and ground-plane design. Designers should route the I2S clock and data as a compact digital group, separate sensitive analog inputs from switching nodes, and use the manufacturer's recommended supply bypass capacitors.
推荐
Digital Audio Mixer
A digital mixer can use the WM8782SEDS/V to capture two analog line-level channels before routing them into a mixing engine. The converter's 16-bit to 24-bit configurable output and 8kHz to 192kHz sampling range support different source and processing requirements. Master or slave clocking provides integration flexibility with external DSP clocks, while FORMAT and IWL allow configuration without dedicated glue logic. In this application, preserving channel alignment requires stable shared clocking and matched analog routing, while preventing converter switching energy from coupling into the input references is essential for clean operation.
推荐
Industrial Audio Acquisition
The WM8782SEDS/V can support two-channel industrial audio acquisition where both high-resolution data and a maximum 192kHz sample rate are required. Its -40C to +85C operating range is suitable for many industrial environments, although system-level environmental qualification remains necessary. The I2S output can feed an embedded controller or DSP, and selectable oversampling helps align the converter with the processing bandwidth. Since the WM8782 family is discontinued, production use requires an explicit lifecycle review, stock plan, and ongoing change control rather than unrestricted new-design adoption.
推荐
Audio Measurement Instrument
The WM8782SEDS/V can serve as the analog acquisition stage in a compact audio measurement instrument that evaluates two channels at up to 192kHz. Its 24-bit resolution and configurable digital word length provide useful headroom for analysis, while the I2S interface simplifies connection to a digital signal processor. Accurate results depend on clean references, well-controlled analog inputs, and synchronous clocking. The converter should be positioned near the input stage with short analog traces, a continuous return path, and decoupling placed to follow the manufacturer application circuit.
推荐
Media-Capture and Monitoring System
The WM8782SEDS/V is appropriate for media-capture and monitoring equipment requiring a compact two-channel ADC with digital output. Its integrated front-end op-amp reduces the amount of external analog circuitry for suitable line-level sources, while I2S simplifies transfer into monitoring or storage electronics. Sample-rate selection must account for storage bandwidth, processing latency, and oversampling mode. Because this is a discontinued family member, an engineered system should retain the exact footprint and verify lifecycle availability, allowing future migration to a redesigned converter only when supply continuity or new feature requirements justify it.
推荐
推荐产品汇总
工程参考数据： WM8782SEDS/V ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | WM8782SEDS |
|---|---|---|
| Package | SSOP-20 | SSOP-20 - same |
| Brand | Cirrus Logic | Cirrus Logic |
| Product Type | Stereo audio ADC | Stereo audio ADC |
| Resolution | 24 bit | 24 bit |
| Maximum Sampling Rate | 192kHz | 192kHz |
| Number of Input Channels | 2 channels | 2 channels |
| Digital Interface | I2S | I2S |
| Supply Voltage | 2.7V to 3.6V or 4.5V to 5.5V | 2.7V to 3.6V or 4.5V to 5.5V |
| Operating Temperature | -40C to +85C | -40C to +85C |
| Lifecycle Status | Obsolete | Discontinued WM8782 family |
关键差异点
- Exact-family package compatibility （对比 WM8782SEDS)
- High-rate stereo conversion in one device （对比 PCM1808PW)
- Configurable digital interface behavior （对比 WM8782SEDS)
设计说明
Use the pin-description table and recommended application circuit in the manufacturer datasheet to assign the 20 SSOP pins and place bypass capacitors. Keep the analog input traces short, route them away from digital clock and data lines, and provide a continuous ground reference beneath the analog section. Do not use a generic SSOP-20 footprint assumption for signal mapping; verify orientation and function against the exact WM8782 documentation.
Treat the M/S, FORMAT, IWL, clock, and I2S connections as a coordinated interface group. Establish the master or slave relationship with the host before selecting the audio rate, and verify that the selected 32x, 64x, or 128x oversampling mode is supported by the downstream processor. Series damping may be evaluated on clock and data lines if edge ringing appears, but its final value should be validated with the actual board and load.
Do not treat any ADC with two channels and similar resolution as a drop-in substitute. PCM1808PW, for example, uses a 14-pin TSSOP package and has a different supply and pin arrangement. Replacing the WM8782SEDS/V without a board redesign can cause incorrect connections, inadequate decoupling, or incompatible data timing. For an existing SSOP-20 design, confirm the exact WM8782 suffix and obtain written manufacturer or authorized-channel confirmation before substitution.
Decouple each supply domain close to its associated pins and follow the component values and grounding arrangement shown in the manufacturer application circuit. The device supports both 2.7V to 3.6V and 4.5V to 5.5V operating ranges, so the system rails, interface voltage levels, and bypass strategy must be selected as one design. Keep switching-regulator and digital clock routing away from the analog input references to reduce conversion artifacts.
合规信息
The WM8782 family is listed by Cirrus Logic as discontinued. No explicit RoHS, REACH, lead-free, halogen-free, or conflict-minerals declarations were identified for the exact suffix in the available product information.
