RTAX2000S-CQ352V vs RTAX4000S-CQ352V مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ RTAX2000S-CQ352V بواسطة Microchip Technology و RTAX4000S-CQ352V بواسطة Microchip Technology. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
Microchip Technology
RTAX2000S-CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-CQ352V ✓ نشطMicrochip Technology
RTAX4000S-CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000S-CQ352V ✓ نشطمقارنة المواصفات
| المعامل | RTAX2000S-CQ352V | RTAX4000S-CQ352V |
|---|---|---|
| العلامة التجارية | Microchip Technology | Microchip Technology |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | نشط | نشط |
| System Gates | 2,000,000 | — |
| Combinational Logic Blocks (CLBs) | 21504 | — |
| Logic Cells | 32256 | 60,480 |
| Logic Family / Process | Digital CMOS | — |
| Programmability Type | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant (RTAX-S family) | Radiation-tolerant (space-flight grade) |
| SEU Immunity | SEU-hardened registers, immune to single-event upsets | — |
| العلبة | CQ352 (352-pin hermetic ceramic quad flat package) | CQ352 (352-pin ceramic column grid array) |
| درجة حرارة التشغيل | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| نوع التركيب | Surface Mount | — |
| Configuration | Live at power-up, no external boot memory required | Live at power-up, single-chip, no external configuration device |
| جهد التغذية | [DATA_NEEDED: core supply voltage] | [DATA_NEEDED: core supply voltage] |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM block size] | Embedded SRAM with built-in FIFO control logic |
| Quality Screening | [DATA_NEEDED: QML/MIL-PRF-38535 screening level] | — |
| حالة RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Family | — | RTAX-S/SL Radiation-Tolerant FPGAs |
| Equivalent System Gates | — | 4,000,000 gates |
| Combinational Logic Blocks | — | 40,320 |
| Technology | — | CMOS, antifuse (OTP) |
| Clock Resources | — | Segmentable clocks, chip-wide highway routing |
| Architecture Base | — | Axcelerator commercial FPGA family |
| Application Domain | — | Space-flight systems |
| Max User I/O | — | [DATA_NEEDED: maximum user I/O count for CQ352] |
| Screening | — | Standard vs SL variant distinguished by ICCA limits at 125C final electrical test |