RTAX2000S-CQ352V vs RTAX4000S-CQ352V तुलना
विस्तृत दोनों ओर की तुलना RTAX2000S-CQ352V द्वारा Microchip Technology और RTAX4000S-CQ352V द्वारा Microchip Technology. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Microchip Technology
RTAX2000S-CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
RTAX2000S-CQ352V ✓ सक्रियMicrochip Technology
RTAX4000S-CQ352V - 4M-Gate Rad-Tolerant FPGA | Microchip
RTAX4000S-CQ352V ✓ सक्रियविशेषता तुलना
| पैरामीटर | RTAX2000S-CQ352V | RTAX4000S-CQ352V |
|---|---|---|
| ब्रांड | Microchip Technology | Microchip Technology |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | सक्रिय | सक्रिय |
| System Gates | 2,000,000 | — |
| Combinational Logic Blocks (CLBs) | 21504 | — |
| Logic Cells | 32256 | 60,480 |
| Logic Family / Process | Digital CMOS | — |
| Programmability Type | Antifuse (one-time programmable) | — |
| Radiation Tolerance | Radiation-tolerant (RTAX-S family) | Radiation-tolerant (space-flight grade) |
| SEU Immunity | SEU-hardened registers, immune to single-event upsets | — |
| पैकेज | CQ352 (352-pin hermetic ceramic quad flat package) | CQ352 (352-pin ceramic column grid array) |
| ऑपरेटिंग तापमान | -55C to +125C | [DATA_NEEDED: operating temperature range] |
| माउंटिंग प्रकार | Surface Mount | — |
| Configuration | Live at power-up, no external boot memory required | Live at power-up, single-chip, no external configuration device |
| सप्लाई वोल्टेज | [DATA_NEEDED: core supply voltage] | [DATA_NEEDED: core supply voltage] |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| Embedded Memory | [DATA_NEEDED: embedded SRAM block size] | Embedded SRAM with built-in FIFO control logic |
| Quality Screening | [DATA_NEEDED: QML/MIL-PRF-38535 screening level] | — |
| RoHS स्थिति | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL level] | — |
| Family | — | RTAX-S/SL Radiation-Tolerant FPGAs |
| Equivalent System Gates | — | 4,000,000 gates |
| Combinational Logic Blocks | — | 40,320 |
| Technology | — | CMOS, antifuse (OTP) |
| Clock Resources | — | Segmentable clocks, chip-wide highway routing |
| Architecture Base | — | Axcelerator commercial FPGA family |
| Application Domain | — | Space-flight systems |
| Max User I/O | — | [DATA_NEEDED: maximum user I/O count for CQ352] |
| Screening | — | Standard vs SL variant distinguished by ICCA limits at 125C final electrical test |